DLP-2232ML-G LOW-PROFILE USB MODULE
* Lead Free *
1.0 Introduction
The DLP-2232ML-G utilizes FTDI's third-generation USB UART/FIFO I.C., the
FT2232D. This low-cost, RoHS compliant development tool features two Multi-Purpose
UART/FIFO controllers that can be configured individually in several different modes.
In addition to the UART interface, FIFO interface, and Bit-Bang IO modes of the
second-generation FT232BM and FT245BM devices, the FT2232D offers a variety of
additional modes of operation including a Multi-Protocol Synchronous Serial Engine
interface designed specifically for synchronous serial protocols such as JTAG and SPI
bus.
The DLP-2232ML-G features a quality four-layer printed circuit board with a solid
ground plane, an integral 93C56 EEPROM on board for easy OEM customization and a
standard 40-pin, 0.6in wide footprint. Integral power control and on-board MOSFET
power switch make the DLP-2232ML-G a perfect choice for USB bus-powered, high-
power designs as well as self- and low-powered products.
NOTE: With the exception of the mechanical connectors, mechanical dimensions and the
host connection interface signals, the DLP-2232ML-G and DLP-2232M-G are the same
product. The supporting electronics for the USB connector are already on the DLP-
2232ML-G board, just add a type B connector to your design and you’re ready to go.
For a complete list of features and specifications please refer to the datasheet for the
DLP-2232M-G.
Rev 2.1 (July 2008)
1
DLP-2232ML-G
DLP Design, Inc.
2.0 Module Pin-Out
1
40
20
C
32
22
FT
21
Figure 2. Pin-Out (40 Pin DIP Header )
2.1 Pin Definitions
Since the DLP-2232ML-G does not have a USB connector, the USBDM and USBDP
signal lines are brought out on pins 23 and 22 as shown here.
With the exception of the 2 USB communications lines (USBDP and USBDM) and pin
20, the pinout for the DLP-2232ML-G is the same as the DLP-2232M-G module. Please
refer to the datasheet for the DLP-2232M-G for a complete description of the pinout.
Rev 2.1 (July 2008)
2
DLP-2232ML-G
DLP Design, Inc.
3.0 Mechanical Dimensions
Inches (mm)
0.05 typ.
( 1.3typ.)
2.0 typ.
(50.8 typ.)
0.05 typ.
(1.3 typ.)
0.1 typ.
(2.54 typ.)
.040” ID – Compatible with
.025” square post headers
0.063 typ.
(1.6 typ.)
**
**Components on top and
bottom of PCB
0.7 typ.
(17.8 typ.)
0.17 typ.
(4.4 typ.)
Rev 2.1 (July 2008)
3
DLP-2232ML-G
DLP Design, Inc.
4.0 Disclaimer
© DLP Design, Inc., 2002 / 2008
Neither the whole nor any part of the information contained in, or the product described
in this manual, may be adapted or reproduced in any material or electronic form without
the prior written consent of the copyright holder.
This product and its documentation are supplied on an as-is basis and no warranty as to
their suitability for any particular purpose is either made or implied. DLP Design, Inc.
will not accept any claim for damages howsoever arising as a result of use or failure of
this product. Your statutory rights are not affected. This product or any variant of it is not
intended for use in any medical appliance, device or system in which the failure of the
product might reasonably be expected to result in personal injury.
This document provides preliminary information that may be subject to change without
notice.
5.0 Contact Information
DLP Design, Inc.
1605 Roma Ln.
Allen, TX 75013
Phone: 469-964-8027
Fax: 415-901-4859
E-Mail ( Sales ) :
sales@dlpdesign.com
E-Mail ( Support ) :
support@dlpdesign.com
Web Site URL :
http://www.dlpdesign.com
Rev 2.1 (July 2008)
4
DLP-2232ML-G
DLP Design, Inc.
5
4
3
2
1
DLP-2232ML MODULE
VCCUSB
EXT5V
C3
10uF
FB2
FB
C8
.1uF
C12
.033uF
C13
.01uF
R7
2k2
C9
.1uF
1
2
C11
.1uF
FB1
1
FB
2
Q1
IRLML6402
SWVCC
C10
10uF
D
D
C1
.01uF
C2
.1uF
USBDM
USBDP
C7
47pF
C4
.1uF
C15
.1uF
46
3
42
14
31
C
R1
470R
VCCIOA
VCCIOB
C14
.1uF
SI/WUB
BC3
BC2
BC1
BC0
BD7
BD6
BD5
BD4
BD3
BD2
BD1
BD0
GND
GND
VCCSW
VCCIOB
VCCIOA
EXT5V
GND
VCCIOA
VCCIOB
VCC
VCC
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AC0
AC1
AC2
AC3
SI/WUA
BD0
BD1
BD2
BD3
BD4
BD5
BD6
BD7
BC0
BC1
BC2
BC3
48
1
2
EECS
EESK
EEDATA
47
TEST
AGND
GND
GND
GND
GND
SI/WUB
PWREN
15
13
12
11
10
40
39
38
37
36
35
33
32
30
29
28
27
26
41
24
23
22
21
20
19
17
16
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AC0
AC1
AC2
AC3
SI/WUA
BD0
BD1
BD2
BD3
BD4
BD5
BD6
BD7
BC0
BC1
BC2
BC3
SI/WUB
JP5
6
3V3OUT
USBDM
USBDP
8
7
RSTOUT#
R4
5
RSTOUT#
XTIN
43
1
3
44
XTOUT
RESET#
VCCUSB
RSTIN#
R8
4
47K
1.5K
2
.
CR1
6MHz
B
.
.
AVCC
DNS
C6
47pF
R3
27R
R2
27R
C5
.033uF
U2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AC0
AC1
AC2
AC3
SI/WUA
RSTIN#
RSTOUT#
GND
GND
USBDM
USBDP
VCCUSB
C
CONN PCB 20x2
B
VCCUSB
U4
8
7
6
5
VCC
NC
NC
GND
93C56
R6
R5
A
45
9
18
25
34
CS
SK
DIN
DOUT
1
2
3
4
EECS
EESK
EEDATA
FT2232
2k2
10k
A
C18
.1uF
GND
Title
Size
B
Date:
<Title>
Document Number
<Doc>
4
3
2
Rev
<RevCode>
Saturday, April 17, 2004
Sheet
1
of
1
5
1
