DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches
February 1991
Revised February 2000
DM74ALS137
3 to 8 Line Decoder/Demultiplexer with Address Latches
General Description
The ALS137 is a three line to eight line decoder/demulti-
plexer with latches on the three address inputs. When the
latch-enable input (GL) is LOW, the ALS137 acts as a
decoder/demultiplexer. When GL goes from LOW-to-HIGH,
the address present at the select inputs (A, B, and C) is
stored in the latches. Further address changes are ignored
as long as GL remains HIGH. The output enable controls,
G1 and G2, control the state of the outputs independently
of the select or latch-enable inputs. All of the outputs are
HIGH unless G1 is HIGH and G2 is LOW. The ALS137 is
ideally suited for implementing glitch-free decoders in
strobed (stored-address) applications in bus-oriented sys-
tems.
Features
s
Combines decoder and 3-bit address latch
s
Incorporates 3 enable inputs to simplify cascading
s
Low power dissipation:
28 mW typ
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
Ordering Code:
Order Number
DM74ALS137M
DM74ALS137N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Enable
GL G1 G2 C
X
X
L
L
L
L
L
L
L
L
H
X
L
H
H
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
X
X
L
L
L
L
H
H
H
H
X
Select
B
X
X
L
L
H
H
L
L
H
H
X
Outputs
A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X
X
L
H
L
H
L
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
X Output corresponding to stored
address, L; all others, H
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
© 2000 Fairchild Semiconductor Corporation
DS006202
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DM74ALS137
Logic Diagram
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2
DM74ALS137
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
Typical
θ
JA
N Package
M Package
75.5°C/W
104.0°C/W
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
t
W
t
SU
t
H
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Width of Enabling Pulse
Setup Time (Note 2)
Hold Time (Note 2)
Free Air Operating Temperature
GL LOW
A, B, C
A, B, C
10
10↑
5↑
0
70
Parameter
Min
4.5
2
0.8
−0.4
8
Nom
5
Max
5.5
Units
V
V
V
mA
mA
ns
ns
ns
°C
Note 2:
The arrow (↑) indicates the positive edge of the GL input pulse is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25°C.
Symbol
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
I
O
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
Input Current @ Maximum
Input Voltage
HIGH Level
Input Current
LOW Level
Input Current
Output Drive Current
Supply Current
V
CC
=
5.5V
V
IH
=
7V
V
CC
=
5.5V
V
IH
=
2.7V
V
CC
=
5.5V
V
IL
=
0.4V
V
CC
=
5.5V, V
O
=
2.25V
V
CC
=
5.5V
I
OH
= −0.4
mA
V
CC
=
4.5V to 5.5V
V
CC
=
4.5V
I
OL
=
4 mA
I
OL
=
8 mA
Enable
A, B, C
Enable
A, B, C
Enable
A, B, C
−30
5
Conditions
V
CC
=
4.5V, I
I
= −18
mA
V
CC
−
2
0.25
0.35
0.4
0.5
0.1
0.1
20
20
−0.1
−0.1
−112
11
Min
Typ
Max
−1.5
Units
V
V
V
V
mA
µA
mA
mA
mA
3
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DM74ALS137
Switching Characteristics
over recommended operating free air temperature range.
Symbol
t
PLH
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Conditions
V
CC
=
4.5V to 5.5V
R
L
=
500Ω
C
L
=
50 pF
From (Input)
To (Output)
A, B, C
5
to Y
A, B, C
6
to Y
G2
4
to Y
G2
5
to Y
G1
5
to Y
G1
5
to Y
GL
7
to Y
GL
7
to Y
20
ns
22
ns
15
ns
17
ns
15
ns
12
ns
20
ns
20
ns
Min
Max
Units
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4
DM74ALS137
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
5
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