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DS2120E+

SCSI Interface IC

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:Maxim(美信半导体)

厂商官网:https://www.maximintegrated.com/en.html

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
零件包装代码
SSOP
包装说明
TSSOP, TSSOP28,.25
针数
28
Reach Compliance Code
unknown
ECCN代码
EAR99
Is Samacsys
N
差分输出
YES
接口集成电路类型
SCSI BUS TERMINATOR
JESD-30 代码
R-PDSO-G28
JESD-609代码
e3
长度
9.7 mm
湿度敏感等级
1
功能数量
1
信号线数量
9
端子数量
28
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
TSSOP
封装等效代码
TSSOP28,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)
260
电源
3/5 V
标称上拉电阻
105 Ω
认证状态
Not Qualified
座面最大高度
1.1 mm
最大供电电压
5.5 V
最小供电电压
2.7 V
表面贴装
YES
温度等级
COMMERCIAL
端子面层
Tin (Sn)
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
4.4 mm
Base Number Matches
1
文档预览
DS2120
Ultra3 LVD SCSI Terminator
www.maxim-ic.com
FEATURES
Fully Compliant with Ultra3, Ultra160,
Ultra320, and Ultra2 (LVD only) SCSI
Provides Low-Voltage Differential (LVD)
Termination for Nine Signal Line Pairs
Zero Temperature Coefficient Termination
Resistors
Autoselection of LVD Termination
5% Tolerance on LVD Termination
Resistance
Low Power-Down Capacitance of 3pF
Built-In Mode Change Filter/Delay
On-Board Thermal Shutdown Circuitry
SCSI Bus Hot Plug Compatible
PIN CONFIGURATION
VREF
R1P
R1N
R2P
R2N
HS GND
R3P
R3N
R4P
R4N
R5P
R5N
ISO
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TPWR
TPWR
R9N
R9P
R8N
R8P
HS GND
R7N
R7P
R6N
R6P
DIFF_CAP
DIFFSENSE
MSTR/SLV
TSSOP
VREF
NC
NC
R1P
R1N
R2P
R2N
HS GND
HS GND
HS GND
R3P
R3N
R4P
R4N
R5P
R5N
ISO
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
TPWR
NC
LVD
NC
R9N
R9P
R8N
R8P
HS GND
HS GND
HS GND
R7N
R7P
R6N
R6P
DIFF_CAP
DIFFSENSE
MSTR/SLV
APPLICATIONS
Raid Systems
SCSI Host Bus Adapter Cards (HBA)
Servers
SCSI Cables
Network Attached Storage (NAS)
Storage Area Networks (SANs)
SSOP
ORDERING INFORMATION
PART
DS2120B
DS2120B/T&R
DS2120E
DS2120E+
DS2120E/T&R
DS2120E+T&R
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
VOLTAGE
(V)
5
5
5
5
5
5
PIN-PACKAGE
36 SSOP
36 SSOP/Tape and Reel
28 TSSOP
28 TSSOP
28 TSSOP/Tape and Reel
28 TSSOP/Tape and Reel
TOP MARK*
DS2120
DS2120
DS2120
DS2120
DS2120
DS2120
+
Denotes lead-free/RoHS-compliant package.
*
The top mark includes a "+" on lead-free packages.
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REV: 010506
DS2120
GENERAL DESCRIPTION
The DS2120 Ultra3 LVD SCSI terminator is a low-voltage differential (LVD) terminator. If the device is
connected in an LVD-only bus, the DS2120 uses LVD termination. If any single-ended (SE) or high-
voltage differential (HVD) devices are connected to the bus, the DS2120 disconnects from the bus. This
is accomplished inside the part automatically by sensing the voltage on the SCSI bus DIFFSENS line.
For the LVD termination, the DS2120 integrates two current sources with nine precision resistor strings.
Three DS2120 terminators are needed for a wide SCSI bus.
REFERENCE DOCUMENTS
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
Small Computer Systems Interface (SCSI-3)
SCSI Parallel Interface (SPI)
SCSI Parallel Interface 2 (SPI-2)
SCSI Parallel Interface 3 (SPI-3)
SCSI Parallel Interface 4 (SPI-4)
Project: 0855-M, 1995
Project: 1142-M, 1998
Project: 1302-D, 1999
Project: 1365-D, 200x
Available from:
American National Standards Institute (ANSI) Phone: 212-642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: 800-854-7179
FUNCTIONAL DESCRIPTION
The DS2120 combines LVD termination with DIFFSENSE sourcing and detection.
LVD termination is provided by a laser-trimmed resistor biased with two current sources and a common-
mode voltage source, generated from a bandgap reference of 1.25V. The configuration is a y-type
terminator with a 105Ω differential and 150Ω common-mode resistance. A fail-safe bias of 112mV is
maintained when no drivers are connected to the SCSI bus. In non-LVD mode, the resistors are isolated
from the bus.
The DIFF_CAP pin of DS2120 monitors the DIFFSENS line to determine the proper operating mode of
the device. If the voltage on the DIFF_CAP is between 0.7V and 1.9V, the device enters LVD mode after
the mode-change delay. If the voltage at the DIFF_CAP later crosses one of the thresholds, the DS2120
again changes modes after the mode-change delay. The mode-change delay is the same when changing in
or out of LVD mode. A new mode change can start anytime after a previous mode change has been
detected. These modes are the following:
LVD Mode:
LVD termination is provided by a precision laser-trimmed resistor string with two
current sources. This configuration yields a 105Ω differential and 150Ω common-mode
impedance. A fail-safe bias of 112mV is maintained when no drivers are connected to the SCSI
bus.
SE Isolation Mode:
The DS2120 identifies that there is a SE (single-ended) device on the SCSI
bus and isolates the termination pins from the bus.
HVD Isolation Mode:
The DS2120 identifies that there is an HVD device on the SCSI bus and
isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus and VREF remains active.
The mode-change delay/filter is still active and the LVD pin continues to indicate the correct bus mode.
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DS2120
During thermal shutdown, the termination pins are isolated from the SCSI bus and VREF becomes high
impedance. The DIFFSENS driver is shut down during either of these two events. The DIFF_CAP
receiver is disabled and the LVD goes low, indicating a non-LVD condition.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and V
DD
lines should be bypassed locally. A 2.2µF capacitor
and a 0.01µF high-frequency capacitor are recommended between TPWR and ground and placed as close
as possible to the DS2120. The DS2120 should be placed as close as possible to the SCSI connector to
minimize signal and power trace length, thereby lessening input capacitance and reflections that can
degrade the bus signals.
To maintain the specified regulation, a 4.7µF capacitor is required between the VREF pin and ground of
each DS2120. A high-frequency cap (0.1µF ceramic recommended) can also be placed on the VREF pin
in applications that use fast rise/fall-time drivers. A typical SCSI bus configuration is shown in Figure 2.
DIFFSENS Noise Filtering:
The DS2120 incorporates a digital filter to remove high-frequency
transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This
filter eliminates the need for the external capacitor and resistor, which previously performed this function.
The external filter can be used in addition to the digital filter if the DS2120 and DS2118M or DS2119M
are to be used interchangeably.
NOTES:
1) DIFFSENS: Refers to the SCSI bus signal.
2) DIFFSENSE: Refers to the Dallas Semiconductor pin name and internal circuitry relating to
differential sensing.
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DS2120
Figure 1. Block Diagram
2.15V
DIFF CAP
Mode Change
Delay/Filter
0.6V
1.30V
LVD
DIFFSENSE
THERMAL
SHUTDOWN
ISO
MSTR/SLV
CONTROL
LOGIC
R1N
R1P
I_GEN
2.15V
REFERENCE
GENERATOR
1.30V
0.6V
R9N
1.25V
R9P
VREF
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DS2120
Figure 2. SCSI Bus Configuration
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参数对比
与DS2120E+相近的元器件有:DS2120B/T&R、DS2120B。描述及对比如下:
型号 DS2120E+ DS2120B/T&R DS2120B
描述 SCSI Interface IC SCSI Interface IC SCSI Interface IC
是否Rohs认证 符合 不符合 不符合
零件包装代码 SSOP SSOP SSOP
包装说明 TSSOP, TSSOP28,.25 SSOP-36 SSOP-36
针数 28 36 36
Reach Compliance Code unknown not_compliant not_compliant
ECCN代码 EAR99 EAR99 EAR99
差分输出 YES YES YES
接口集成电路类型 SCSI BUS TERMINATOR SCSI BUS TERMINATOR SCSI BUS TERMINATOR
JESD-30 代码 R-PDSO-G28 R-PDSO-G36 R-PDSO-G36
JESD-609代码 e3 e0 e0
长度 9.7 mm 15.375 mm 15.375 mm
功能数量 1 1 1
信号线数量 9 9 9
端子数量 28 36 36
最高工作温度 70 °C 70 °C 70 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TSSOP SSOP SSOP
封装等效代码 TSSOP28,.25 SOP36,.4,32 SOP36,.4,32
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度) 260 245 245
电源 3/5 V 3/5 V 3/5 V
标称上拉电阻 105 Ω 105 Ω 105 Ω
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 1.1 mm 2.64 mm 2.64 mm
最大供电电压 5.5 V 5.5 V 5.5 V
最小供电电压 2.7 V 2.7 V 2.7 V
表面贴装 YES YES YES
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL
端子面层 Tin (Sn) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 GULL WING GULL WING GULL WING
端子节距 0.65 mm 0.8 mm 0.8 mm
端子位置 DUAL DUAL DUAL
处于峰值回流温度下的最长时间 30 NOT SPECIFIED NOT SPECIFIED
宽度 4.4 mm 7.5 mm 7.5 mm
厂商名称 - Maxim(美信半导体) Maxim(美信半导体)
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