dsPIC33FJ16(GP/MC)101/102 AND
dsPIC33FJ32(GP/MC)101/102/104
16-Bit Digital Signal Controllers
(up to 32-Kbyte Flash and 2-Kbyte SRAM)
Operating Conditions
• 3.0V to 3.6V, -40
°
C to +125
°
C, DC to 16 MIPS
Advanced Analog Features
• ADC module:
- 10-bit, 1.1 Msps with four S&H
- Four analog inputs on 18-pin devices and up to
14 analog inputs on 44-pin devices
• Flexible and Independent ADC Trigger Sources
• Three Comparator modules
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
•
3.0V to 3.6V, -40
°
C to +150
°
C, DC to 5 MIPS
Core: 16-Bit dsPIC33F CPU
•
•
•
•
•
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Clock Management
•
•
•
•
•
±0.25% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Timers/Output Compare/Input Capture
• Up to Five General Purpose Timers:
- One 16-bit and up to two 32-bit timers/counters
• Two Output Compare modules
• Three Input Capture modules
• Peripheral Pin Select (PPS) to allow Function Remap
Communication Interfaces
• UART module (4 Mbps):
- With support for LIN/J2602 Protocols and IrDA
®
• 4-Wire SPI module (8 MHz maximum speed):
- Remappable pins in 32-Kbyte Flash devices
• I
2
C™ module (400 kHz)
Power Management
•
•
•
•
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
1 mA/MHz Dynamic Current (typical)
30 µA I
PD
Current (typical)
PWM
Up to Three PWM Pairs
Two Dead-Time Generators
31.25 ns PWM Resolution
PWM Support for:
- Inverters, PFC, UPS
- BLDC, PMSM, ACIM, SRM
• Class B-Compliant Fault Inputs
• Possibility of ADC Synchronization with PWM Signal
•
•
•
•
Input/Output
• Sink/Source 10 mA or 6 mA, Pin-Specific for Standard
V
OH
/V
OL
, up to 16 mA or 12 mA for Non-Standard V
OH
1
• 5V Tolerant Pins
• Up to 20 Selectable Open-Drain and Pull-ups
• Three External Interrupts (two are remappable)
Qualification and Class B Support
• AEC-Q100 REV G (Grade 0 -40
°
C to +150
°
C)
• Class B Safety Library, IEC 60730, UDE Certified
Debugger Development Support
• In-Circuit and In-Application Programming
• Up to Three Complex Data Breakpoints
• Trace and Run-Time Watch
2011-2014 Microchip Technology Inc.
DS70000652F-page 1
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
dsPIC33FJ16(GP/MC)101/102 AND
dsPIC33FJ32(GP/MC)101/102/104
PRODUCT FAMILIES
The device names, pin counts, memory sizes and
peripheral availability of each device are listed in
Table 1.
The following pages show their pinout
diagrams.
TABLE 1:
dsPIC33FJ16(GP/MC)101/102 DEVICE FEATURES
Program Flash (Kbyte)
External Interrupts
(3)
10-Bit, 1.1 Msps ADC
Motor Control PWM
Remappable Peripherals
RAM (Kbytes)
Remappable Pins
Output Compare
16-bit Timer
(1,2)
Comparators
PWM Faults
Input Capture
UART
dsPIC33FJ16GP101
18
20
16
16
16
1
1
1
8
8
16
3
3
3
3
3
3
2
2
2
1
1
1
3
3
3
SPI
Device
1
1
1
—
—
—
—
—
—
1 ADC,
4-ch
1 ADC,
4-ch
1 ADC,
6-ch
Y
Y
Y
1
1
1
3
3
3
Y
Y
Y
13 PDIP,
SOIC
15 SSOP
21 SPDIP,
SOIC,
SSOP,
QFN
21 VTLA
15 PDIP,
SOIC,
SSOP
21 SPDIP,
SOIC,
SSOP,
QFN
21 VTLA
dsPIC33FJ16GP102
28
36
dsPIC33FJ16MC101
20
16
16
1
1
16
10
3
3
3
3
2
2
1
1
3
3
1
1
—
6-ch
—
1
1 ADC,
6-ch
1 ADC,
4-ch
1 ADC,
6-ch
Y
Y
1
1
3
3
Y
Y
dsPIC33FJ16MC102
28
16
1
16
3
3
2
1
3
1
6-ch
2
Y
1
3
Y
36
Note 1:
2:
3:
16
1
16
3
3
2
1
3
1
6-ch
2
1 ADC,
6-ch
Y
1
3
Y
Two out of three timers are remappable.
One pair can be combined to create one 32-bit timer.
Two out of three interrupts are remappable.
DS70000652F-page 2
2011-2014 Microchip Technology Inc.
Packages
I/O Pins
CTMU
RTCC
I
2
C™
Pins
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
TABLE 2:
dsPIC33FJ32(GP/MC)101/102/104 DEVICE FEATURES
Program Flash (Kbyte)
External Interrupts
(3)
10-Bit, 1.1 Msps ADC
Remappable Peripherals
Remappable Pins
Motor Control PWM
RAM (Kbytes)
Output Compare
16-bit Timer
(1,2)
PWM Faults
Comparators
Input Capture
dsPIC33FJ32GP101
18
20
32
32
32
2
2
2
8
8
16
5
5
5
3
3
3
2
2
2
1
1
1
3
3
3
SPI
Device
UART
1
1
1
—
—
—
—
—
—
1 ADC,
6-ch
1 ADC,
6-ch
1 ADC,
8-ch
Y
Y
Y
1
1
1
3
3
3
Y
Y
Y
13 PDIP,
SOIC
15 SSOP
21 SPDIP,
SOIC,
SSOP,
QFN
21 VTLA
35 TQFP,
QFN,
VTLA
15 PDIP,
SOIC,
SSOP
21 SPDIP,
SOIC,
SSOP,
QFN
21 VTLA
35 TQFP,
QFN,
VTLA
dsPIC33FJ32GP102
28
36
dsPIC33FJ32GP104
44
32
32
2
2
16
26
5
5
3
3
2
2
1
1
3
3
1
1
—
—
—
—
1 ADC,
8-ch
1 ADC,
14-ch
1 ADC,
6-ch
1 ADC,
8-ch
Y
Y
1
1
3
3
Y
Y
dsPIC33FJ32MC101
20
32
2
10
5
3
2
1
3
1
6-ch
1
Y
1
3
Y
dsPIC33FJ32MC102
28
32
2
16
5
3
2
1
3
1
6-ch
2
Y
1
3
Y
36
dsPIC33FJ32MC104
44
32
32
2
2
16
26
5
5
3
3
2
2
1
1
3
3
1
1
6-ch
6-ch
2
2
1 ADC,
8-ch
1 ADC,
14-ch
Y
Y
1
1
3
3
Y
Y
Note 1:
2:
3:
Four out of five timers are remappable.
Two pairs can be combined to have up to two 32-bit timers.
Two out of three interrupts are remappable.
2011-2014 Microchip Technology Inc.
DS70000652F-page 3
Packages
I/O Pins
CTMU
RTCC
I
2
C™
Pins
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Pin Diagrams
= Pins are up to 5V tolerant
18-Pin PDIP/SOIC
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN
/CV
REFOUT
/C2INB/C1IND/RP1
(1)
/CN5/RB1
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
PGED3/SOSCI/RP4
(1)
/CN1/RB4
PGEC3/SOSCO/T1CK/CN0/RA4
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
DD
V
SS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
CAP
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
SCK1/INT0/RP7
(1)
/CN23/RB7
dsPIC33FJ16GP101
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN
/CV
REFOUT
/C2INB/C1IND/RP1
(1)
/CN5/RB1
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
DD
V
SS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
CAP
V
SS
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
dsPIC33FJ32GP101
Note 1:
The RPn pins can be used by any remappable peripheral. See
Table 1
for the list of available peripherals.
DS70000652F-page 4
2011-2014 Microchip Technology Inc.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Pin Diagrams (Continued)
= Pins are up to 5V tolerant
20-Pin SSOP
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN
/CV
REFOUT
/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
PGED3/SOSCI/RP4
(1)
/CN1/RB4
PGEC3/SOSCO/T1CK/CN0/RA4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
AV
DD
AV
SS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
DD
V
CAP
V
SS
SDA1/SDI1/RP9
(1)
/CN21/RB9
SCL1/SDO1/RP8
(1)
/CN22/RB8
SCK1/INT0/RP7
(1)
/CN23/RB7
dsPIC33FJ16GP101
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN
/CV
REFOUT
/C2INB/C1IND/RP1
(1)
/CN5/RB1
V
SS
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
PGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
AV
DD
AV
SS
RP15
(1)
/CN11/RB15
RTCC/RP14
(1)
/CN12/RB14
V
DD
V
CAP
V
SS
SDA1/RP9
(1)
/CN21/RB9
SCL1/RP8
(1)
/CN22/RB8
INT0/RP7
(1)
/CN23/RB7
dsPIC33FJ32GP101
Note 1:
The RPn pins can be used by any remappable peripheral. See
Table 1
for the list of available peripherals.
2011-2014 Microchip Technology Inc.
DS70000652F-page 5
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