dsPIC33FJ32GP302/304,
dsPIC33FJ64GPX02/X04, and
dsPIC33FJ128GPX02/X04
16-bit Digital Signal Controllers (up to 128 KB Flash and
16K SRAM) with Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
System Peripherals
• 16-bit dual channel 100 ksps Audio DAC
• Cyclic Redundancy Check (CRC) module
• Up to five 16-bit and up to two 32-bit Timers/
Counters
• Up to four Input Capture (IC) modules
• Up to four Output Compare (OC) modules
• Real-Time Clock and Calendar (RTCC) module
Clock Management
•
•
•
•
•
•
2% internal oscillator
Programmable PLL and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Low-power management modes
Fast wake-up and start-up
Communication Interfaces
• Parallel Master Port (PMP)
• Two UART modules (10 Mbps)
- Supports LIN 2.0 protocols
- RS-232, RS-485, and IrDA
®
support
• Two 4-wire SPI modules (15 Mbps)
• Enhanced CAN (ECAN) module (1 Mbaud) with
2.0B support
• I
2
C module (100K, 400K and 1Mbaud) with
SMbus support
• Data Converter Interface (DCI) module with I
2
S
codec support
Core Performance
• Up to 40 MIPS 16-bit dsPIC33F CPU
• Single-cycle MUL plus hardware divide
Advanced Analog Features
• 10/12-bit ADC with 1.1Msps/500 ksps rate:
- Up to 13 ADC input channels and four S&H
- Flexible/Independent trigger sources
• 150 ns Comparators:
- Up to two Analog Comparator modules
- 4-bit DAC with two ranges for Analog Comparators
Direct Memory Access (DMA)
• 8-channel DMA with no CPU stalls or overhead
• UART, SPI, ADC, ECAN, IC, OC, INT0
Input/Output
•
•
•
•
•
Software remappable pin functions
5V-tolerant pins
Selectable open drain and internal pull-ups
Up to 5 mA overvoltage clamp current/pin
Multiple external interrupts
Qualification and Class B Support
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC)
• Class B Safety Library, IEC 60730, VDE certified
Debugger Development Support
• In-circuit and in-application programming
• Two program breakpoints
• Trace and run-time watch
Packages
Type
SPDIP
SOIC
QFN-S
28
21
0.65
6x6x0.9
QFN
44
35
0.65
8x8x0.9
TQFP
44
35
0.80
10x10x1
Pin Count
28
28
I/O Pins
21
21
.100”
1.27
Contact Lead/Pitch
Dimensions
.285x.135x1.365”
7.50x2.05x17.9
Note:
All dimensions are in millimeters (mm) unless specified.
©
2007-2012 Microchip Technology Inc.
DS70292G-page 1
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
dsPIC33FJ32GP302/304,
dsPIC33FJ64GPX02/X04, AND
dsPIC33FJ128GPX02/X04 PRODUCT
FAMILIES
The device names, pin counts, memory sizes, and
peripheral availability of each device are listed below.
The following pages show their pinout diagrams.
TABLE 1:
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
CONTROLLER FAMILIES
Analog Comparator
(2 Channels/Voltage Regulator)
Remappable Peripheral
Data Converter Interface
16-bit Audio DAC (Pins)
Program Flash Memory
(Kbyte)
External Interrupts
(3)
8-bit Parallel Master
Port (Address Lines)
Remappable Pins
Output Compare
Standard PWM
10-bit/12-bit ADC
(Channels)
16-bit Timer
(2)
Input Capture
CRC Generator
RAM (Kbyte)
(1)
dsPIC33FJ128GP804
dsPIC33FJ128GP802
44
28
128
128
16
16
26
16
5
5
4
4
4
4
1
1
2
2
SPI
Device
2
2
ECAN™
1
1
3
3
1
1
1
1
1
1
13
10
6
4
1/1
1/0
11
2
35
21
QFN
TQFP
SPDIP
SOIC
QFN-S
QFN
TQFP
SPDIP
SOIC
QFN-S
QFN
TQFP
SPDIP
SOIC
QFN-S
QFN
TQFP
SPDIP
SOIC
QFN-S
QFN
TQFP
dsPIC33FJ128GP204
dsPIC33FJ128GP202
44
28
128
128
8
8
26
16
5
5
4
4
4
4
1
1
2
2
2
2
0
0
3
3
1
1
1
1
1
1
13
10
0
0
1/1
1/0
11
2
35
21
dsPIC33FJ64GP804
dsPIC33FJ64GP802
44
28
64
64
16
16
26
16
5
5
4
4
4
4
1
1
2
2
2
2
1
1
3
3
1
1
1
1
1
1
13
10
6
4
1/1
1/0
11
2
35
21
dsPIC33FJ64GP204
dsPIC33FJ64GP202
44
28
64
64
8
8
26
16
5
5
4
4
4
4
1
1
2
2
2
2
0
0
3
3
1
1
1
1
1
1
13
10
0
0
1/1
1/0
11
2
35
21
dsPIC33FJ32GP304
dsPIC33FJ32GP302
44
28
32
32
4
4
26
16
5
5
4
4
4
4
1
1
2
2
2
2
0
0
3
3
1
1
1
1
1
1
13
10
0
0
1/1
1/0
11
2
35
21
Note
1:
2:
3:
SPDIP
SOIC
QFN-S
RAM size is inclusive of 2 Kbytes of DMA RAM for all devices except dsPIC33FJ32GP302/304, which include 1 Kbyte of DMA RAM.
Only four out of five timers are remappable.
Only two out of three interrupts are remappable.
DS70292G-page 2
©
2007-2012 Microchip Technology Inc.
Packages
UART
I/O Pins
RTCC
I
2
C™
Pins
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Pin Diagrams
28-Pin SPDIP, SOIC
MCLR
AN0/V
REF
+/CN2/RA0
AN1/V
REF
-/CN3/RA1
PGED1/AN2/C2IN-/RP0
(1)
/CN4/RB0
PGEC1/ AN3/C2IN+/RP1
(1)
/CN5/RB1
AN4/C1IN-/RP2
(1)
/CN6/RB2
AN5/C1IN+/RP3
(1)
/CN7/RB3
V
SS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/PMA0/RA3
SOSCI/RP4 /CN1/PMBE/RB4
SOSCO/T1CK/CN0/PMA1/RA4
V
DD
PGED3/ASDA1/RP5
(1)
/CN27/PMD7/RB5
(1)
= Pins are up to 5V tolerant
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AV
DD
AV
SS
AN9/DAC1LN/RP15
(1)
/CN11/PMCS1/RB15
AN10/DAC1LP/RTCC/RP14
(1)
/CN12/PMWR/RB14
AN11/DAC1RN/RP13
(1)
/CN13/PMRD/RB13
AN12/DAC1RP/RP12
(1)
/CN14/PMD0/RB12
PGEC2/TMS/RP11
(1)
/CN15/PMD1/RB11
PGED2/TDI/RP10
(1)
/CN16/PMD2/RB10
V
CAP
V
SS
TDO/SDA1/RP9
(1)
/CN21/PMD3/RB9
TCK/SCL1/RP8
(1)
/CN22/PMD4/RB8
INT0/RP7
(1)
/CN23/PMD5/RB7
PGEC3/ASCL1/RP6
(1)
/CN24/PMD6/RB6
dsPIC33FJ64GP802
dsPIC33FJ128GP802
28-Pin SPDIP, SOIC
= Pins are up to 5V tolerant
MCLR
AN0/V
REF
+/CN2/RA0
AN1/V
REF
-/CN3/RA1
PGED1/AN2/C2IN-/RP0
(1)
/CN4/RB0
PGEC1/ AN3/C2IN+/RP1
(1)
/CN5/RB1
AN4/C1IN-/RP2
(1)
/CN6/RB2
AN5/C1IN+/RP3
(1)
/CN7/RB3
V
SS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/PMA0/RA3
SOSCI/RP4 /CN1/PMBE/RB4
SOSCO/T1CK/CN0/PMA1/RA4
V
DD
PGED3/ASDA1/RP5
(1)
/CN27/PMD7/RB5
(1)
1
2
3
28
27
26
AV
DD
AV
SS
AN9/RP15
(1)
/CN11/PMCS1/RB15
AN10/RTCC/RP14
(1)
/CN12/PMWR/RB14
AN11/RP13
(1)
/CN13/PMRD/RB13
AN12/RP12
(1)
/CN14/PMD0/RB12
PGEC2/TMS/RP11
(1)
/CN15/PMD1/RB11
PGED2/TDI/RP10
(1)
/CN16/PMD2/RB10
V
CAP
V
SS
TDO/SDA1/RP9
(1)
/CN21/PMD3/RB9
TCK/SCL1/RP8
(1)
/CN22/PMD4/RB8
INT0/RP7
(1)
/CN23/PMD5/RB7
PGEC3/ASCL1/RP6
(1)
/CN24/PMD6/RB6
dsPIC33FJ32GP302
dsPIC33FJ64GP202
dsPIC33FJ128GP202
4
5
6
7
8
9
10
11
12
13
14
25
24
23
22
21
20
19
18
17
16
15
Note
1:
The RPx pins can be used by any remappable peripheral. See
Table 1
in this section for the list of available peripherals.
©
2007-2012 Microchip Technology Inc.
DS70292G-page 3
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Pin Diagrams (Continued)
28-Pin QFN-S
(2)
AN10/DAC1LP/RTCC/RP14
(1)
/CN12/PMWR/RB14
= Pins are up to 5V tolerant
28
26
25
27
24
23
AV
SS
AN9/DAC1LN/RP15
(1)
/CN11/PMCS1/RB15
AN1/V
REF
-/CN3/RA1
AN0/V
REF
+/CN2/RA0
MCLR
AV
DD
PGED1/AN2/C2IN-/RP0
(1)
/CN4/RB0
PGEC1/AN3/C2IN+/RP1
(1)
/CN5/RB1
AN4/C1IN-/RP2
(1)
/CN6/RB2
AN5/C1IN+/RP3
(1)
/CN7/RB3
V
SS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/PMA0/RA3
22
1
2
21
20
AN11/DAC1RN/RP13
(1)
/CN13/PMRD/RB13
AN12/DAC1RP/RP12
(1)
/CN14/PMD0/RB12
PGEC2/TMS/RP11
(1)
/CN15/PMD1/RB11
PGED2/TDI/RP10
(1)
/CN16/PMD2/RB10
V
CAP
V
SS
TDO/SDA1/RP9
(1)
/CN21/PMD3/RB9
3
dsPIC33FJ64GP802
19
4
dsPIC33FJ128GP802
18
5
6
7
10
11
12
13
14
8
17
16
15
9
PGED3/ASDA1/RP5
(1)
/CN27/PMD7/RB5
Note
1:
2:
The RPx pins can be used by any remappable peripheral. See
Table 1
in this section for the list of available peripherals.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
PGEC3/ASCL1/RP6
(1)
/CN24/PMD6/RB6
INT0/RP7
(1)
/CN23/PMD5/RB7
TCK/SCL1/RP8
(1)
/CN22/PMD4/RB8
SOSCI/RP4
(1)
/CN1/PMBE/RB4
SOSCO/T1CK/CN0/PMA1/RA4
V
DD
DS70292G-page 4
©
2007-2012 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Pin Diagrams (Continued)
28-Pin QFN-S
(2)
AN10/DAC1LP/RTCC/RP14
(1)
/CN12/PMWR/RB14
=
Pins are up to 5V tolerant
28
26
25
27
24
23
AV
SS
AN9/DAC1LN/RP15
(1)
/CN11/PMCS1/RB15
AN1/V
REF
-/CN3/RA1
AN0/V
REF
+/CN2/RA0
MCLR
AV
DD
PGED1/AN2/C2IN-/RP0
(1)
/CN4/RB0
PGEC1/AN3/C2IN+/RP1
(1)
/CN5/RB1
AN4/C1IN-/RP2
(1)
/CN6/RB2
AN5/C1IN+/RP3
(1)
/CN7/RB3
V
SS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/PMA0/RA3
22
1
2
21
20
AN11/RP13
(1)
/CN13/PMRD/RB13
AN12/RP12
(1)
/CN14/PMD0/RB12
PGEC2/TMS/RP11
(1)
/CN15/PMD1/RB11
PGED2/TDI/RP10
(1)
/CN16/PMD2/RB10
V
CAP
V
SS
TDO/SDA1/RP9
(1)
/CN21/PMD3/RB9
3
dsPIC33FJ32GP302
19
4
dsPIC33FJ64GP202
18
5
dsPIC33FJ128GP202
17
6
7
10
11
12
13
14
8
16
15
9
SOSCI/RP4
(1)
/CN1/PMBE/RB4
Note
1:
2:
The RPx pins can be used by any remappable peripheral. See
Table 1
in this section for the list of available peripherals.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
©
2007-2012 Microchip Technology Inc.
PGED3/ASDA1/RP5
(1)
/CN27/PMD7/RB5
PGEC3/ASCL1/RP6
(1)
/CN24/PMD6/RB6
INT0/RP7
(1)
/CN23/PMD5/RB7
TCK/SCL1/RP8
(1)
/CN22/PMD4/RB8
SOSCO/T1CK/CN0/PMA1/RA4
V
DD
DS70292G-page 5
