PRELIMINARY
PCMCIA Flash Memory Card
FLC Series
PCMCIA Flash Memory Card
General Description
1
MEGABYTE through 10 MEGABYTE (AMD based)
Features
•
Low cost Medium/High Density Linear Flash
Card
•
Based on AMD Am29F040 Components
(equivalent of AMD’s AmC0XXCFLKA)
•
Single supply operation, no additional
programming voltage required
- 5 V only for write, erase and read operations
•
Fast Read Performance
- 150ns Maximum Access Time
•
PCMCIA/JEIDA 68-pin standard
- x8/ x16 Data Interface
- type I Form Factor
•
Automated write and erase operations
- 64Kbyte memory sectors for faster
automated erase speed
- Typically 1.5 s per single memory sector
erase
- Random address writes to previously erased
bytes; 16µs per byte typical
•
100,000 Erase/Program Cycles
WEDC’s FLC Series Flash memory cards offer medium/high
density linear Flash solid state storage solutions for code and
data storage, high performance disk emulation and execute in
place (XIP) applications in mobile PC and dedicated
(embedded) equipment.
FLC series cards conform to PCMCIA international standard.
The card’s control logic provides the system interface and
controls
the
internal
Flash
memories.
Card
can
be
read/written in byte-wide or word-wide mode which allows
for flexible integration into various systems. Combined with
file management software, such as Flash Translation Layer
(FTL), FLC Flash cards provide removable high-performance
disk emulation.
The FLC series cards contain separate 2kB EEPROM
memory for Card Information Structure (CIS) which can be
used for easy identification of card characteristics.
The WEDC FLC series is based on AMD Am29F040 Flash
memories; the FLC04 is a direct equivalent of AMD’s
AmC0XXCFLKA, however it offers wider range of
intermediate memory capacities.
Note: Standard options include attribute memory. Cards
without attribute memory are available. Cards are also
available with or without a hardware write protect switch.
Architecture Overview
FLC Series Cards are based on the Am29F040 (4Mb) components which work with single 5V applications.
Manufacture/Device code is 01h/A4h.
FLC series is designed to support from 2 to 20components, providing densities ranging from 1MB to 10MB in 1MB
increments. In support of the PC Card 95 standard for word wide access devices are paired. Write, read and erase
operations can be performed as either a word or byte wide operation . By multiplexing A0, CE1# and CE2#, 8-bit
hosts can access all data on data lines DQ0 - DQ7. The FLC series cards conform to the PC Card Standard
(PCMCIA) and JEIDA, providing electrical and physical compatibility. The PC Card form factor offers an industry
standard pinout and mechanical outline, allowing density upgrades without system design changes.
WEDC’s standard cards are shipped with WEDC’s Logo. Cards are also available with blank housings (no Logo).
The blank housings are available in both a recessed (for label) and flat housing. Please contact WEDC sales
representative for further information on Custom artwork.
PC Card Products
July 28. 1999
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
1
FLC Series
Block Diagram
Vcc
Device Pair 9
Device 19
CSH9
Device 18
CSL9
Array Address
Bus A1-A19
ADDRESS
BUFFER
ADDRESS BUS
A1-A23
Control
Address
Bus
WE#
OE#
CE2#
CE1#
REG#
A0
WP
Vcc
CSH9
CSH0
Device Pair 1
CSL9
Device 3
CSH1
Device Pair 0
Device 1
CSH0
Device 0
CSL0
WR#
RD#
Device 2
CSL1
CSL0
C9
High
C0
Control Logic
PCMCIA
Interface
C9
Low
C0
Ctrl Att enable
Attrib. Mem
CIS
EEPROM 2kB
Vcc
DATA
BUS
Q8-Q15
DATA
BUS
Q0-Q7
Q0-Q7
control
Vcc
I/O buffer
DATA
BUS
D8-D15
DATA
BUS
D0-D7
CD1#
CD2#
WAIT#
BVD1
BVD2
VS1
VS2
Vpp1
Vpp2
open
open
open
open
GND
Vcc
Vcc
SUPPORTED COMPONENTS (max 20 X):
Am29F040
Device type
Am29F040
Manuf ID Device ID
01
H
A4
H
PC Card Products
July 28. 1999
White Electronic Designs
One Research Drive Westborough, MA 01581
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2
FLC Series
Pinout
Pin Signal name
1
GND
2
DQ3
3
DQ4
4
DQ5
5
DQ6
6
DQ7
7
CE1#
8
A10
9
OE#
10
A11
11
A9
12
A8
13
A13
14
A14
15
WE#
16
RDY/BSY
#
17
Vcc
18
Vpp1
19
A16
20
A15
21
A12
22
A7
23
A6
24
A5
25
A4
26
A3
27
A2
28
A1
29
A0
30
DQ0
31
DQ1
32
DQ2
33
WP
34
GND
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin Signal name
35
GND
36
CD1#
37
DQ11
38
DQ12
39
DQ13
40
DQ14
41
DQ15
42
CE2#
43
VS1
44
RFU
45
RFU
46
A17
47
A18
48
A19
49
A20
50
A21
51
Vcc
52
Vpp2
53
A22
54
A23
55
A24
56
A25
57
VS2
58
R ST
59
Wait#
60
RFU
61
REG#
62
BVD2
63
BVD1
64
DQ8
65
DQ9
66
DQ10
67
CD2#
68
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Active
Ground
Card Detect 1
LOW
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
LOW
Voltage Sense 1
N.C.
Reserved
N.C.
Reserved
N.C.
Address bit 17
Address bit 18
Address bit 19
1MB(2)
Address bit 20
2MB(2)
Address bit 21
4MB(2,3)
Supply Voltage
Prog. Voltage
N.C.
Address bit 22
8MB(2,3)
Address bit 23
16/10MB(2,3)
Address bit 24
N.C.
Address bit 25
N.C.
Voltage Sense 2
N.C.
Card Reset
N.C.
Extended Bus cycle
LOW(1)
Reserved
N.C.
Attrib Mem Select
LOW
Bat. Volt. Detect 2
(1)
Bat. Volt. Detect 1
(1)
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
LOW
Ground
LOW
LOW
LOW
N.C.
N.C.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I
I
I
I
O
I
O
I
O
O
I/O
I/O
O
O
HIGH
Notes:
1) Wait#, BVD1 and BVD2 are driven high for compatibility
2) Shows density for which specified address bit is MSB. Higher order address bits are N.C. (i.e. 4MB A21 is MSB A22 - A25 are NC).
3) For the 3MB card the memory will wrap at the 4MB boundary, for 5MB, 6MB, and & 7MB cards the memory will wrap at the 8MB
boundary, for 9MB and 10MB cards the memory will wrap at the 16MB boundary.
Mechanical
1.0mm
±
0.05
(0.039”)
1.6mm
±
0.05
(0.063”)
Interconnect area
10.0mm MIN
(0.400”)
3.0mm MIN
Substrate area
54.0mm
±
0.10
(2.126”)
1.0mm
±
0.05
(0.039”)
10.0mm MIN
(0.400”)
85.6mm
±
0.20
(3.370”)
3.3mm
±
T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
PC Card Products
July 28. 1999
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
3
FLC Series
Card Signal Description
Symbol
Type
INPUT
A0 - A25
DQ0 - DQ15
CE1#, CE2#
OE#
WE#
RDY/BSY#
CD1#, CD2#
WP
INPUT/OUTPUT
INPUT
INPUT
INPUT
N.C.
OUTPUT
OUTPUT
VPP1
VPP2
VCC
GND
REG#
RST
WAIT#
BVD1, BVD2
VS1, VS2
RFU
N.C.
N.C.
N.C.
Name and Function
ADDRESS INPUTS:
A0 through A25 enable direct addressing of up to
64MB of memory on the card. Signal A0 is not used in word access mode.
The memory will wrap at the card density boundary (see PINOUT, note 3).
The system should not try to access memory beyond the card density. A25
is the most significant bit. A24 – A25 are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the bi-directional
databus. DQ0 – DQ7 constitute the lower (even) byte and DQ8 – DQ15 the
upper (odd) byte. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2#
enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows 8-bit
hosts to access all data on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal gating read data from the memory
card.
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or
program algorithms. This signal is not connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals
are internally connected to ground on the card. The host shall monitor these
signals to detect card insertion (pulled-up on host side).
WRITE PROTECT:
Write protect reflects the status of the Write Protect
switch on the memory card. WP set to high = write protected, providing
internal hardware write lockout to the Flash array.
If card does not include optional write protect switch, this signal will be
pulled low internally indicating write protect = "off".
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages
12.0V for lower byte (D0 – D7) memory components. This signal is not
connected.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages
12.0V for upper byte (D8 – D15) memory components. This signal is not
connected.
CARD POWER SUPPLY:
(5.0V).
CARD GROUND
ATTRIBUTE MEMORY SELECT :
Active low signal, enables access to
Attribute Memory Plane, occupied by Card Information Structure and Card
Registers.
RESET:
Active high signal for placing cards in Power-on default state. This
signal is not connected.
WAIT:
This signal is pulled high internally for compatibility. No wait states
are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain
SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V card.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left floating
INPUT
N.C.
OUTPUT
OUTPUT
OUTPUT
Functional Truth Table
READ function
Common Memory
Attribute Memory
Function Mode
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
WRITE function
/CE2 /CE1
H
H
H
L
H
L
L
L
L
H
H
H
H
L
L
H
L
L
L
H
A0
X
L
H
X
X
X
L
H
X
X
/OE
X
L
L
L
L
X
H
H
H
H
/WE
X
H
H
H
H
X
L
L
L
L
/REG D15-D8
D7-D0
X
High-Z
High-Z
H
High-Z Even-Byte
H
High-Z
Odd-Byte
H
Odd-Byte Even-Byte
H
Odd-Byte
High-Z
X
H
H
H
H
X
X
X
Even-Byte
X
Odd-Byte
Odd-Byte Even-Byte
Odd-Byte
X
/REG D15-D8
D7-D0
X
High-Z
High-Z
L
High-Z Even-Byte
L
High-Z Not Valid
L
Not Valid Even-Byte
L
Not Valid
High-Z
X
L
L
L
L
X
X
X
X
X
X
Even-Byte
X
Even-Byte
X
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
PC Card Products
July 28. 1999
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
4
FLC Series
Absolute Maximum Ratings (1)
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
DC Characteristics
(1)
Symbol Parameter
I
CCR
I
CCW
I
CCE
VCC Read Current
VCC Program Current
VCC Erase Current
Density
All
All
All
1MB
2MB
4MB
10MB
0.015
0.015
0.015
0.015
Notes
Typ
(2)
0°C to +60 °C
-40°C to +85 °C
-30°C to +80 °C
-40°C to +85 °C
-0.5V to VCC+0.5V
-0.5V to +7.0V
Notes:
(1) Stress greater than those listed under “Absolute
Maximum ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation at these or any other conditions
greater than those indicated in the operational
sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Max
45
65
65
0.7
0.9
1.3
2.5
Units Test Conditions
mA
mA
mA
VCC = VCCmax
tcycle = 150ns,CMOS levels
Programming in Progress
Erasure in Progress
VCC = VCCmax
Control Signals = VCC
CMOS levels
VCC Standby Current
I
CCS
(CMOS)
mA
CMOS Test Conditions: VCC = 5V ± 5%, VIL = VSS ± 0.2V, VIH = VCC ± 0.2V
Notes:
1. All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Byte wide operations. For 16 bit
operation values are double.
2. Typical: VCC = 5V, T = +25ºC
Symbol
I
LI
I
LO
V
IL
V
IH
V
OL
V
OH
V
LKO
Parameter
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
VCC Erase/Program
Lock Voltage
Notes
1
1
1
1
1
1
1
Min
Max
±20
±20
Units
µA
µA
V
V
V
V
V
Test Conditions
VCC = VCCMAX
Vin =VCC or VSS
VCC = VCCMAX
Vout =VCC or VSS
0
0.7VCC
0.8
VCC+0.5
0.4
IOL = 3.2mA
IOH = -2.0mA
VCC-0.4
3.2
VCC
4.2
Notes:
1) Values are the same for byte and word wide modes for all card densities.
2) Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to
internal pull-up resistors.
PC Card Products
July 28. 1999
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
5
FLC Series
