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EF-CSP-SIOTK-FL

software chip scope pro

器件类别:模块/解决方案   

厂商名称:XILINX(赛灵思)

厂商官网:https://www.xilinx.com/

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ChipScope Pro 13.1
Software and Cores
User Guide []
UG029 (v13.1) March 1, 2011 []
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
of designs to operate with Xilinx® hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,
without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves
the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors
contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with
technical support or assistance that may be provided to you in connection with the Information.
THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER
WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY
RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL
DAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION.
© Copyright 2011. Xilinx, Inc. XILINX, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, and other designated brands included herein are
trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
Revision History
The following table shows the revision history for this document.
Date
Version
Revision
Updated all chapters to be compatible with 10.1 tools.
Updated version numbers to reflect version number of tools.
Replaced the ChipScope™ CORE Generator™ tool with the Xilinx CORE Generator tool.
03/24/08
10.1
Chapter 1, “Introduction”:
Added Xilinx CORE Generator tool to
Table 1-1, page 7;
Updated PC and Linux system requirements in
Table 1-9, page 43
and
Table 1-10,
page 43,
respectively, removed
“Host System Requirements for Solaris.” Chapter 4,
“Using the ChipScope Pro Analyzer”:
Added
“Using Multiple Platform Cable USB
Connections,” page 84
and
“External Input,” page 102. Chapter 5, “ChipScope Engine
Tcl Interface”:
Updated
“Requirements,” page 133
and
“::chipscope::csefpga_get_config_reg,” page 184.
Updated all chapters to be compatible with 11.1 tools.
Added ChipScope Pro IBERT support.
Chapter 1, “Introduction”:
Expanded
“IBERT Core,” page 19.
04/24/09
11.1
Chapter 4, “Using the ChipScope Pro Analyzer”: “IBERT Console Window for Virtex-5
FPGA GTP and GTX Transceivers,” page 103.
Chapter 5, “ChipScope Engine Tcl Interface”:
Expanded
“CSE/Tcl Command
Summary,” page 134:
Added commands in
“CseFpga Command Details,” page 180
,
“CseCore Command Details,” page 194,
and
“CseVIO Command Details,” page 197.
Added
Appendix B, “References.”
ChipScope Pro Software and Cores User Guide
www.xilinx.com
UG029 (v13.1) March 1, 2011
Date
Version
Revision
Updated all chapters to be compatible with 11.2 tools. Added Support for Virtex®-6
LXT/SXT/CXT
families.
Updated:
“IBERT Design Flow,” page 19
and
“::chipscope::csevio_write_values,” page 205,
“::chipscope::csevio_read_values,” page 206,
and
Appendix B, “References.”
Added:
“IBERT Feature Descriptions,” page 19, Table 1-6, page 23 “Generating IBERT v2.0 Cores
for Virtex-6 FPGA GTX Transceivers,” page 50, “IBERT Console Window for Virtex-6
FPGA GTX Transceivers,” page 117.
11.3 updates. Added support for Spartan®-6 FPGAs. Added
IBERT Core for the
Spartan-6 FPGA GTP transceivers section in
“IBERT Feature Descriptions,” page 19
and
Table 1-8, page 25, “Generating IBERT v2.0 Cores for Virtex-6 FPGA GTH
Transceivers,” page 52, “Sweep Test Settings Panel,” page 120, “IBERT Console Window
for Spartan-6 FPGA GTP Transceivers,” page 126,
and
Appendix A, “ChipScope Pro
Tools Troubleshooting Guide.”
Updated all chapters to be compatible with 11.4 tools. Added support for Virtex-6 FPGA
HXT devices. Updated
“IBERT Feature Descriptions,” page 19
and
Table 1-7, page 24.
Added
“Generating IBERT v2.0 Cores for Virtex-6 FPGA GTH Transceivers,” page 52.
Updated all chapters to be compatible with 12.1 tools
Added IBERT v2.0 for Virtex-5 FPGA GTX Transceivers
Added Analyzer support for opening JTAG plug-ins
Added support for ByteTools Catapult EJ-1 Ethernet-to-JTAG cable
Added Analyzer single and repetitive trigger run modes
Added Analyzer trigger and capture status
Added csejtag_target is_connected command
Added csefpga_configure_device_with_file command
Added csefpga_is_configured command
06/24/09
11.2
09/16/09
11.3
12/02/09
11.4
04/19/10
12.1
09/21/2010
12.3
Updated for 12.3 release.
Added 7
series
support for logic debug
Removed IBA/PLB (not IBA/PLB46)
Removed IBA/OPB
Removed IBERT V4 GT11
Added Startup trigger mode
Added Analyzer IBERT sweep test plot
Added standalone IBERT plot viewer
Added 1/2, 1/4, 1/8 line rate support for GTH
Added ICON, ILA, VIO, and ATC2
Added MARK_DEBUG to PA UG
Updated the CSE/Tcl section with new commands and changes
03/01/11
13.1
UG029 (v13.1) March 1, 2011
www.xilinx.com
ChipScope Pro Software and Cores User Guide
ChipScope Pro Software and Cores User Guide
www.xilinx.com
UG029 (v13.1) March 1, 2011
Table of Contents
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Chapter 1: Introduction
ChipScope Pro Tools Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ChipScope Pro Tools Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ChipScope Pro Cores Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
System Requirements
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Software Installation and Licensing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Chapter 2: Using the Core Generator Tools
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Xilinx CORE Generator Tool with ChipScope Pro Cores
. . . . . . . . . . .
Generating an ICON Core
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Generating an ILA Core
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Generating the VIO Core
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Generating the ATC2 Core
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Generating IBERT v1.0 Cores for Virtex-5 FPGAs
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Generating IBERT v2.0 Cores for Virtex-5 FPGA GTX Transceivers
. . . . . . . . . .
Generating IBERT v2.0 Cores for Virtex-6 FPGA GTX Transceivers
. . . . . . . . . .
Generating IBERT v2.0 Cores for Virtex-6 FPGA GTH Transceivers
. . . . . . . . . .
Generating IBERT v2.0 Cores for Spartan-6 FPGA GTP Transceivers
. . . . . . . . .
29
29
29
32
37
39
42
48
50
52
54
Chapter 3: Using the ChipScope Pro Core Inserter
Core Inserter Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Core Inserter with PlanAhead
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Core Inserter with ISE Project Navigator
. . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Core Inserter with Command Line Implementation
. . . . . . . . . . . . . . . .
ChipScope Pro Core Inserter Features
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
57
57
59
62
Chapter 4: Using the ChipScope Pro Analyzer
Analyzer Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Analyzer Server Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Analyzer Client Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Analyzer Features
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ChipScope Pro ILA Waveform Toolbar Features
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
ChipScope Pro Analyzer Command Line Options
. . . . . . . . . . . . . . . . . . . . . . . . . . . 131
ChipScope Pro Software and Cores User Guide
UG029 (v13.1) March 1, 2011
www.xilinx.com
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参数对比
与EF-CSP-SIOTK-FL相近的元器件有:EF-CSP-SIOTK-NL。描述及对比如下:
型号 EF-CSP-SIOTK-FL EF-CSP-SIOTK-NL
描述 software chip scope pro software chip scope pro
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