EFM8 Laser Bee Family
EFM8LB1 Data Sheet
The EFM8LB1, part of the Laser Bee family of MCUs, is a per-
formance line of 8-bit microcontrollers with a comprehensive ana-
log and digital feature set in small packages.
These devices offer state-of-the-art performance by integrating 14-bit ADC, internal
calibrated temperature sensor (±3 °C), and up to four 12-bit DACs into small packages,
making them ideal for the most stringent analog requirement applications. With an effi-
cient, pipelined 8051 core with maximum operating frequency at 72 MHz, various com-
munication interfaces, and four channels of configurable logic, the EFM8LB1 family is
optimal for many embedded applications.
EFM8LB1 applications include the following:
• Optical network modules
• Precision instrumentation
• Industrial control and automation
• Smart sensors
KEY FEATURES
• Pipelined 8-bit 8051 MCU Core with
72 MHz operating frequency
• Up to 29 multifunction I/O pins
• One 14-bit, 900 ksps ADC
• Up to four 12-bit DACs with
synchronization and PWM capabilities
• Two low-current analog comparators with
built-in reference DACs
• Internal calibrated temperature sensor
(±3 °C)
• Internal 72 MHz and 24.5 MHz oscillators
accurate to ±2%
• Four channels of Configurable Logic
• 6-channel PWM / PCA
• Six 16-bit general-purpose timers
Core / Memory
CIP-51 8051 Core
(72 MHz)
Flash Program
Memory
(up to 64 KB)
Clock Management
External
Oscillator
High Frequency
72 MHz RC
Oscillator
High Frequency
24.5 MHz RC
Oscillator
Energy Management
Internal LDO
Regulator
Power-On Reset
RAM Memory
(up to 4352 bytes)
Debug Interface
with C2
Low Frequency
RC Oscillator
Brown-Out Detector
8-bit SFR bus
Serial Interfaces
2 x UART
SPI
High-Speed
I2C Slave
I/O Ports
External
Interrupts
General
Purpose I/O
Timers and Triggers
Timers
0/1/2/5
Watchdog
Timer
Analog Interfaces
ADC
2x
Comparators
Internal
Voltage
Reference
Security
16-bit CRC
Pin Reset
PCA/PWM
Timer 3/4
I
2
C / SMBus
Pin Wakeup
4 x Configurable Logic Units
Up to 4 x
Voltage DAC
Lowest power mode with peripheral operational:
Normal
Idle
Suspend
Snooze
Shutdown
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Preliminary Rev. 0.2
EFM8LB1 Data Sheet
Feature List
1. Feature List
The EFM8LB1 device family are fully integrated, mixed-signal system-on-a-chip MCUs. Highlighted features are listed below.
• Core:
• Analog:
• Pipelined CIP-51 Core
• 14/12/10-Bit Analog-to-Digital Converter (ADC)
• Fully compatible with standard 8051 instruction set
• Internal calibrated temperature sensor (±3 °C)
• 70% of instructions execute in 1-2 clock cycles
• 4 x 12-Bit Digital-to-Analog Converters (DAC)
• 72 MHz maximum operating frequency
• 2 x Low-current analog comparators with adjustable refer-
• Memory:
ence
• Up to 64 kB flash memory (63 kB user-accessible), in-sys-
• Communications and Digital Peripherals:
tem re-programmable from firmware in 512-byte sectors
• 2 x UART, up to 3 Mbaud
• Up to 4352 bytes RAM (including 256 bytes standard 8051
• SPI™ Master / Slave, up to 12 Mbps
RAM and 4096 bytes on-chip XRAM)
• SMBus™/I2C™ Master / Slave, up to 400 kbps
• Power:
• I
2
C High-Speed Slave, up to 3.4 Mbps
• Internal LDO regulator for CPU core voltage
• 16-bit CRC unit, supporting automatic CRC of flash at 256-
• Power-on reset circuit and brownout detectors
byte boundaries
• I/O: Up to 29 total multifunction I/O pins:
• 4 Configurable Logic Units
• Up to 25 pins 5 V tolerant under bias
• Timers/Counters and PWM:
• Selectable state retention through reset events
• 6-channel Programmable Counter Array (PCA) supporting
• Flexible peripheral crossbar for peripheral routing
PWM, capture/compare, and frequency output modes
• 5 mA source, 12.5 mA sink allows direct drive of LEDs
• 6 x 16-bit general-purpose timers
• Clock Sources:
• Independent watchdog timer, clocked from the low frequen-
cy oscillator
• Internal 72 MHz oscillator with accuracy of ±2%
• On-Chip, Non-Intrusive Debugging
• Internal 24.5 MHz oscillator with ±2% accuracy
• Full memory and register inspection
• Internal 80 kHz low-frequency oscillator
• Four hardware breakpoints, single-stepping
• External CMOS clock option
• External crystal/RC/C Oscillator (up to 25 MHz)
With on-chip power-on reset, voltage supply monitor, watchdog timer, and clock oscillator, the EFM8LB1 devices are truly standalone
system-on-a-chip solutions. The flash memory is reprogrammable in-circuit, providing nonvolatile data storage and allowing field up-
grades of the firmware. The on-chip debugging interface (C2) allows non-intrusive (uses no on-chip resources), full speed, in-circuit
debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory
and registers, setting breakpoints, single stepping, and run and halt commands. All analog and digital peripherals are fully functional
while debugging. Device operation is specified from 2.2 V up to a 3.6 V supply. Devices are AEC-Q100 qualified (pending) and availa-
ble in 4x4 mm 32-pin QFN, 3x3 mm 24-pin QFN, 32-pin QFP, or 24-pin QSOP packages. All package options are lead-free and RoHS
compliant.
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Preliminary Rev. 0.2 | 1
EFM8LB1 Data Sheet
Ordering Information
2. Ordering Information
EFM8 LB1 2 F 64 E
–
A
–
QFN32 R
Tape and Reel (Optional)
Package Type
Revision
Temperature Grade E (-40 to +105)
Flash Memory Size – 64 KB
Memory Type (Flash)
Family Feature Set
Laser Bee 1 Family
Silicon Labs EFM8 Product Line
Figure 2.1. EFM8LB1 Part Numbering
All EFM8LB1 family members have the following features:
• CIP-51 Core running up to 72 MHz
• Three Internal Oscillators (72 MHz, 24.5 MHz and 80 kHz)
• SMBus
• I2C Slave
• SPI
• 2 UARTs
• 6-Channel Programmable Counter Array (PWM, Clock Generation, Capture/Compare)
• Six 16-bit Timers
• Four Configurable Logic Units
• 14-bit Analog-to-Digital Converter with integrated multiplexer, voltage reference, temperature sensor, channel sequencer, and direct-
to-XRAM data transfer
• Two Analog Comparators
• 16-bit CRC Unit
• AEC-Q100 qualified (pending)
In addition to these features, each part number in the EFM8LB1 family has a set of features that vary across the product line. The
product selection guide shows the features available on each family member.
Table 2.1. Product Selection Guide
Digital Port I/Os (Total)
Comparator 0 Inputs
Comparator 1 Inputs
Pb-free (RoHS Compliant)
Ordering Part Number
Flash Memory (kB)
ADC0 Channels
Voltage DACs
Temperature Range
RAM (Bytes)
Package
QFN32
QFP32
QFN24
QSOP24
Preliminary Rev. 0.2 | 2
EFM8LB12F64E-A-QFN32
EFM8LB12F64E-A-QFP32
EFM8LB12F64E-A-QFN24
EFM8LB12F64E-A-QSOP24
64
64
64
64
4352
4352
4352
4352
29
28
20
21
20
20
12
13
4
4
4
4
10
10
6
6
9
9
6
7
Yes
Yes
Yes
Yes
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
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EFM8LB1 Data Sheet
Ordering Information
Digital Port I/Os (Total)
Comparator 0 Inputs
Comparator 1 Inputs
Pb-free (RoHS Compliant)
Ordering Part Number
Flash Memory (kB)
ADC0 Channels
Voltage DACs
Temperature Range
RAM (Bytes)
Package
QFN32
QFP32
QFN24
QSOP24
QFN32
QFP32
QFN24
QSOP24
QFN32
QFP32
QFN24
QSOP24
QFN32
QFP32
QFN24
QSOP24
Preliminary Rev. 0.2 | 3
EFM8LB12F32E-A-QFN32
EFM8LB12F32E-A-QFP32
EFM8LB12F32E-A-QFN24
EFM8LB12F32E-A-QSOP24
EFM8LB11F32E-A-QFN32
EFM8LB11F32E-A-QFP32
EFM8LB11F32E-A-QFN24
EFM8LB11F32E-A-QSOP24
EFM8LB11F16E-A-QFN32
EFM8LB11F16E-A-QFP32
EFM8LB11F16E-A-QFN24
EFM8LB11F16E-A-QSOP24
EFM8LB10F16E-A-QFN32
EFM8LB10F16E-A-QFP32
EFM8LB10F16E-A-QFN24
EFM8LB10F16E-A-QSOP24
32
32
32
32
32
32
32
32
16
16
16
16
16
16
16
16
2304
2304
2304
2304
2304
2304
2304
2304
1280
1280
1280
1280
1280
1280
1280
1280
29
28
20
21
29
28
20
21
29
28
20
21
29
28
20
21
20
20
12
13
20
20
12
13
20
20
12
13
20
20
12
13
4
4
4
4
2
2
2
2
2
2
2
2
0
0
0
0
10
10
6
6
10
10
6
6
10
10
6
6
10
10
6
6
9
9
6
7
9
9
6
7
9
9
6
7
9
9
6
7
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
-40 to +105 °C
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EFM8LB1 Data Sheet
System Overview
3. System Overview
3.1 Introduction
Debug /
C2D
Programming
Hardware
C2CK/RSTb
CIP-51 8051 Controller
Core
64 KB ISP Flash
Program Memory
Port I/O Configuration
Digital Peripherals
UART0
UART1
Timers 0,
1, 2, 3, 4, 5
6-ch PCA
Priority
Crossbar
Decoder
VIO
Reset
Power-On
Reset
Supply
Monitor
256 Byte SRAM
Port 0
Drivers
P0.n
4096 Byte XRAM
I2C Slave
I2C /
SMBus
SPI
VDD
Port 1
Drivers
P1.n
Power
Net
Voltage
Regulator
VREGIN
GND
Independent
Watchdog
Timer
SYSCLK
SFR
Bus
CRC
Config.
Logic
Units (4)
Crossbar
Control
Port 2
Drivers
P2.n
System Clock
Configuration
Low Freq.
Oscillator
EXTCLK
XTAL1
XTAL2
CMOS Clock
Input
External Crystal /
RC Oscillator
72 MHz 2%
Oscillator
24.5 MHz 2%
Oscillator
Analog Peripherals
Internal
Reference
VDD
VREF
VDD
14/12/10-
bit ADC
AMUX
4 12-bit
DACs
Port 3
Drivers
P3.n
Temp
Sensor
+
-+
-
2 Comparators
Figure 3.1. Detailed EFM8LB1 Block Diagram
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Preliminary Rev. 0.2 | 4
嵌入式系统
