CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3.
For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
V
OS
TCV
OS
V
S
+ = +5V, V
S
- = -5V, R
L
= 10kΩ to 0V, T
A
= +25°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
UNIT
DESCRIPTION
Input Offset Voltage
Average Offset Voltage Drift (Note 4)
V
CM
= 0V
14 LD TSSOP, SOIC package
16 LD QFN package
3
7
2
2
1
2
-5.5
13
mV
µV/°C
µV/°C
I
B
R
IN
C
IN
CMIR
CMRR
A
VOL
Input Bias Current
Input Impedance
Input Capacitance
Common-Mode Input Range
Common-Mode Rejection Ratio
Open Loop Gain
V
CM
= 0V
50
nA
GΩ
pF
+5.5
75
105
V
dB
dB
For V
INx
from -5.5V to +5.5V
-4.5V
≤
V
OUTx
≤ +4.5V
50
75
OUTPUT CHARACTERISTICS
V
OL
V
OH
I
SC
I
OUT
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I
L
= -5mA
I
L
= +5mA
V
CM
= 0V, Source: V
OUTx
short to V
S
-,
Sink: V
OUTx
short to V
S
+
4.85
-4.94
4.94
±200
±70
-4.85
V
V
mA
mA
POWER SUPPLY PERFORMANCE
(V
S
+) - (V
S
-)
I
S
PSRR
Supply Voltage Range
Supply Current (Per Amplifier)
Power Supply Rejection Ratio
V
CM
= 0V, No load
Supply is moved from ±2.25V to ±9.5V
60
4.5
500
75
19
750
V
µA
dB
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 5)
-4.0V
≤
V
OUTx
≤ +4.0V,
20% to 80%
12
V/µs
3
FN6838.0
September 25, 2009
EL5420T
Electrical Specifications
PARAMETER
t
S
BW
GBWP
PM
CS
V
S
+ = +5V, V
S
- = -5V, R
L
= 10kΩ to 0V, T
A
= +25°C, unless otherwise specified.
(Continued)
CONDITIONS
A
V
= +1, V
OUTx
= 2V step,
R
L
= 10kΩ, C
L
= 8pF
R
L
= 10kΩ, C
L
= 8pF
A
V
= -50, R
F
= 5kΩ, R
G
= 100Ω
R
L
= 10kΩ, C
L
= 8pF
A
V
= -50, R
F
= 5kΩ, R
G
= 100Ω
R
L
= 10kΩ, C
L
= 8pF
f = 5MHz
MIN
TYP
500
12
8
50
75
MAX
UNIT
ns
MHz
MHz
°
dB
DESCRIPTION
Settling to +0.1% (Note 6)
-3dB Bandwidth
Gain-Bandwidth Product
Phase Margin
Channel Separation
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
V
OS
TCV
OS
V
S
+ = +5V, V
S
- = 0V, R
L
= 10kΩ to 2.5V, T
A
= +25°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
UNIT
DESCRIPTION
Input Offset Voltage
Average Offset Voltage Drift (Note 4)
V
CM
= 2.5V
14 LD TSSOP, SOIC package
16 LD QFN package
3
7
2
2
1
2
-0.5
13
mV
µV/°C
µV/°C
I
B
R
IN
C
IN
CMIR
CMRR
A
VOL
Input Bias Current
Input Impedance
Input Capacitance
Common-Mode Input Range
Common-Mode Rejection Ratio
Open Loop Gain
V
CM
= 2.5V
50
nA
GΩ
pF
+5.5
70
105
V
dB
dB
For V
INx
from -0.5V to +5.5V
0.5V
≤
V
OUTx
≤+
4.5V
45
75
OUTPUT CHARACTERISTICS
V
OL
V
OH
I
SC
I
OUT
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I
L
= -2.5mA
I
L
= +2.5mA
V
CM
= 2.5V, Source: V
OUTx
short to V
S
-,
Sink: V
OUTx
short to V
S
+
4.85
30
4.97
±125
±70
150
mV
V
mA
mA
POWER SUPPLY PERFORMANCE
(V
S
+) - (V
S
-)
I
S
PSRR
Supply Voltage Range
Supply Current (Per Amplifier)
Power Supply Rejection Ratio
V
CM
= 2.5V, No load
Supply is moved from 4.5V to 19V
60
4.5
500
75
19
750
V
µA
dB
DYNAMIC PERFORMANCE
SR
t
S
BW
GBWP
PM
CS
Slew Rate (Note 5)
Settling to +0.1% (Note 6)
-3dB Bandwidth
Gain-Bandwidth Product
Phase Margin
Channel Separation
1V
≤
V
OUTx
≤
4V, 20% to 80%
A
V
= +1, V
OUTx
= 2V step,
R
L
= 10kΩ, C
L
= 8pF
R
L
= 10kΩ, C
L
= 8pF
A
V
= -50, R
F
= 5kΩ, R
G
= 100Ω
R
L
= 10kΩ, C
L
= 8pF
A
V
= -50, R
F
= 5kΩ, R
G
= 100Ω
R
L
= 10kΩ, C
L
= 8pF
f = 5MHz
12
500
12
8
50
75
V/µs
ns
MHz
MHz
°
dB
4
FN6838.0
September 25, 2009
EL5420T
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
V
OS
TCV
OS
Input Offset Voltage
Average Offset Voltage Drift (Note 4)
V
CM
= 9V
14 LD TSSOP, SOIC package
16 LD QFN package
I
B
R
IN
C
IN
CMIR
CMRR
A
VOL
Input Bias Current
Input Impedance
Input Capacitance
Common-Mode Input Range
Common-Mode Rejection Ratio
Open Loop Gain
For V
INx
from -0.5V to +18.5V
0.5V
≤
V
OUTx
≤
17.5V
-0.5
53
75
78
90
V
CM
= 9V
4
7
2
2
1
2
+18.5
50
15
mV
µV/°C
µV/°C
nA
GΩ
pF
V
dB
dB
V
S
+ = +18V, V
S
- = 0V, R
L
= 10kΩ to 9V, T
A
= +25°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
UNIT
DESCRIPTION
OUTPUT CHARACTERISTICS
V
OL
V
OH
I
SC
I
OUT
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I
L
= -9mA
I
L
= +9mA
V
CM
= 9V, Source: V
OUTx
short to V
S
-,
Sink: V
OUTx
short to V
S
+
17.85
100
17.90
±200
±70
150
mV
V
mA
mA
POWER SUPPLY PERFORMANCE
(V
S
+) - (V
S
-)
I
S
PSRR
Supply Voltage Range
Supply Current (Per Amplifier)
Power Supply Rejection Ratio
V
CM
= 9V, No load
Supply is moved from 4.5V to 19V
60
4.5
550
75
19
750
V
µA
dB
DYNAMIC PERFORMANCE
SR
t
S
BW
GBWP
PM
CS
NOTES:
4. Measured over -40°C to +85°C ambient operating temperature range. See the typical TCV
OS
production distribution shown in the
“Typical Performance Curves” on page 6
5. Typical slew rate is an average of the slew rates measured on the rising (20%-80%) and the falling (80%-20%) edges of the output signal.
6. Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within
a ±0.1% error band. The range of the error band is determined by: Final Value(V)±[Full Scale(V)*0.1%]
