EM MICROELECTRONIC
- MARIN SA
EM4450
1 KBit Read/Write Contactless Identification Device
Description
The EM4450 is a CMOS integrated circuit intended for use
in electronic Read/Write RF Transponders. The chip
contains 1K Bit of EEPROM which can be configured by the
user, allowing a write inhibited area, a read protected area,
and a read area output continuously at power on. The
memory can be secured by using the 32 bit password for all
write and read protected operations. The password can be
updated, but never read. The fixed code serial number and
device identification are laser programmed making every
chip unique.
The EM4450 will transmit data to the transceiver by
modulating the amplitude of the electromagnetic field, and
receive data and commands in a similar way. Simple
commands will enable to write EEPROM, to update the
password, to read a specific memory area, and to reset the
logic.
The coil of the tuned circuit is the only external component
required, all remaining functions are integrated in the chip.
Features
1 K bit of EEPROM organized in 32 words of 32 bits
32 bit Device Serial Number (Read Only Laser ROM)
32 bit Device Identification (Read Only Laser ROM)
Power-On-Reset sequence
Power Check for EEPROM write operation
User defined Read Memory Area at Power On
User defined Write Inhibited Memory Area
User defined Read Protected Memory Area
Data Transmission performed by Amplitude Modulation
Two Data Rate Options 2 KBd (Opt64) or 4 KBd (Opt32)
Bit Period = 64 or 32 periods of field frequency
170pF ± 2% on chip Resonant Capacitor
-40 to +85°C Temperature range
100 to 150 kHz Field Frequency range
On chip Rectifier and Voltage Limiter
No external supply buffer capacitance needed due to low
power consumption
Available in chip form for mass production and PCB for
samples.
Applications
Ticketing
Automotive Immobilizer with rolling code
High Security Hands Free Access Control
Industrial automation with portable database
Manufacturing automation
Prepayment Devices
Typical Operating Configuration
Coil2
L
EM4450
Coil1
Typical value of inductance at 125 kHz is 9.6 mH
Fig.1
Copyright
2014,
EM Microelectronic-Marin SA
4450-DS.doc, Version 4.0, 13-May-14
1
www.emmicroelectronic.com
EM4450
Block Diagram
Modulator
Encoder
ROM
EEPROM
+V
coil2
coil1
C
r
AC/DC
converter
Voltage
Regulator
C
s
Pow er
Control
Reset
Write Enable
Clock
Extractor
Data
Extractor
Sequencer
Command
Decoder
Control
Logic
Fig. 2
System Principle
Transceiver
Data to be sent
to transponder
Modulator
Transponder
Oscillator
Antenna
Driver
Coil 1
EM4450
Data
Decoder
Filter &
Gain
Demodulator
Coil 2
Data received
from
transponder
RECEIVE M ODE
Signal on
Transponder coil
READ M ODE
Signal on
Transceiver coil
Signal on
Transceiver coil
Signal on
Transponder coil
RF Carrier
Data
RF Carrier
Data
Fig. 3
Copyright
2014,
EM Microelectronic-Marin SA
4450-DS.doc, Version 4.0, 13-May-14
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EM4450
Absolute Maximum Ratings
Parameter
Symbol
Maximum AC peak Current
I
COIL
induced on COIL1 and COIL2
Power Supply
V
DD
Maximum Voltage other pads
V
max
Minimum Voltage other pads
V
min
Storage temperature
T
store
Electrostatic discharge
maximum
V
ESD
to MIL-STD-883C method
3015
Conditions
± 30 mA
-0.3 to 3.5 V
V
DD
+0.3V
V
SS
-0.3V
-55 to +125°C
2000V
Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified
operating conditions may affect device reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken
as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are
kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level.
Operating Conditions
Parameter
Operating Temperature
Maximum coil current
AC Voltage on Coil
Supply Frequency
Symbol Min
T
op
-40
I
COIL
V
coil
f
coil
100
Unit
°C
mA
note 1
V
pp
150 kHz
Max
+85
10
note 1:
Maximum voltage is defined by forcing 10mA on Coil1 - Coil2.
Electrical Characteristics
V
DD
=2.5V, V
SS
=0V , f
coil
= 125 kHz Sine wave , V
coil
= 1V
pp
, T
op
= 25°C , unless otherwise specified
Parameter
Symbol
Conditions
Min
Typ
Max
Supply Voltage
V
DD
2.3
3.5
Minimum EEPROM write
V
DDee
2
voltage
Power Check EEPROM write
I
PWcheck
V
DD
= 2.8V
40
Supply current / read
I
rd
Read Mode
3
Suppy current / write
I
wr
Write mode (V
DD
= 2.8V)
22
V
(COIL1 - VSS)
& V
(COIL2 - VSS)
I
coil
= 100µA
0.50
Modulator ON voltage drop
V
ON
V
(COIL1 - VSS)
& V
(COIL2 - VSS)
I
coil
= 5 mA
2.50
Monoflop
T
mono
35
85
Resonance Capacitor
C
r
166.6
170
173.4
Powercheck level
V
PWcheck
2
2.85
Power On Reset level high
V
prh
Rising Supply
1
1.6
Clock extractor input min.
V
clkmin
Minimum Voltage for Clock Extraction
0.25
25
Clock extractor input max.
V
clkmax
Max. Voltage to detect modulation stop
EEPROM data endurance
N
cy
Erase all / Write all at V
DD
= 3.5 V
100'000
EEPROM retention
T
ret
Top = 55°C after 100'000 cycles (note 2)
10
note 2:
Based on 1000 hours at 150°C
Unit
V
V
A
A
A
V
V
s
pF
V
V
V
pp
mV
pp
cycles
years
Copyright
2014,
EM Microelectronic-Marin SA
4450-DS.doc, Version 4.0, 13-May-14
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EM4450
Timing Characteristics
V
DD
=2.5V, V
SS
=0V, f
coil
= 125 kHz Sine wave, V
coil
= 1V
pp
, T
op
= 25°C
unless otherwise specified
All timings are derived from the field frequency and are specified as a number of RF periods.
Parameter
Symbol
Conditions
Value
Unit
Opt64
Option : 64 clocks per bit
Read Bit Period
t
rdb
64
RF periods
LIW/ACK/NACK pattern duration
t
patt
320
RF periods
Read 1 Word Duration
t
rdw
including LIW
3200
RF periods
Processing Pause Time
t
pp
64
RF periods
Write Access Time
t
wa
64
RF periods
Initialization Time
t
init
2112
RF periods
EEPROM write time
t
wee
V
DD
= 3V
3200
RF periods
Opt32
Option : 32 clocks per bit
Read Bit Period
t
rdb
32
RF periods
LIW/ACK/NACK pattern duration
t
patt
160
RF periods
Read 1 Word Duration
t
rdw
including LIW
1600
RF periods
Processing Pause Time
t
pp
32
RF periods
Write Access Time
t
wa
32
RF periods
Initialization Time
t
init
1056
RF periods
EEPROM write time
t
wee
V
DD
= 3V
2624
RF periods
RF periods represent periods of the carrier frequency emitted by the transceiver unit. For example, if 125 kHz is used :
The Read bit period (Opt64) would be : 1/125'000*64 = 512 µs, and the time to read 1 word : 1/125'000*3200 = 25.6 ms.
The Read bit period (Opt32) would be : 1/125'000*32 = 256 µs, and the time to read 1 word : 1/125'000*1600 = 12.8 ms.
ATTENTION
Due to amplitude modulation of the coil-signal, the clock-extractor may miss clocks or add spurious clocks close to
the edges of the RF-envelope. This desynchronisation will not be larger than ±3 clocks per bit and must be taken into
account when developing reader software.
Functional Description
General
The EM4450 is supplied by means of an electromagnetic field induced on the attached coil. The AC voltage is rectified in order
to provide a DC internal supply voltage. When the DC voltage crosses the Power-On level, the chip enters the Standard Read
Mode and sends data continuously. The data to be sent in this mode is user defined by storing the first and last addresses to be
output. When the last address is sent, the chip will continue with the first address until the transceiver sends a request. In the
read mode, a Listen Window (LIW) is generated before each word. During this time, the EM4450 will turn to the Receive Mode
(RM) if it receives a valid RM pattern. The chip then expects a valid command.
Mode of Operation
Pow er-On
Init
Standard
Read Mode
Get Command
NO
Receive
Mode
request ?
Y ES
Execute Command
Login
Write Word
Write Password
Selective Read
Send w ord
Reset
Fig. 4
Copyright
2014,
EM Microelectronic-Marin SA
4450-DS.doc, Version 4.0, 13-May-14
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EM4450
Memory Organisation
The 1024 bit EEPROM is organised in 32 words of 32 bits. The first three words are assigned to the Password, the Protection
word, and the Control word. In order to write one of these three words, it is necessary to send the valid password. At fabrication,
the EM4450 comes with all bits of the password programmed to a logic "0". The Password cannot be read out. The memory
contains two extra words of Laser ROM. These words are laser programmed during fabrication for every chip, are unique and
cannot be altered.
Memory Map
Bit 0
Word 0
1
3
928 Bits of USER
EEPROM
31
32
33
DEVICE SERIAL NUMBER
DEVICE IDENTIFICATION
Laser
Laser
------------------------------
PASSWORD
PROTECTION WORD
CONTROL WORD
Bit 31
EE
EE
EE
EE
Control Word
0–7
First Word Read
8 – 15
Last Word Read
16
Password Check On/Off
17
Read After Write On/Off
18 – 31
User available
Protection Word
0–7
First Word Read Protected
8 – 15
Last Word Read Protected
16 – 23
First Word Write Inhibited
24 – 31
Last Word Write Inhibited
Password
Write Only – No Read Access
Device Identification Word &
Serial Number Word
Laser Programmed – Read only
Fig.5
On means bit set to logic '1'
Off means bit set to logic '0'
Standard Read Mode
After a Power-On-Reset and upon completion of a command, the chip will execute the Standard Read Mode, in which it will
send data continuously, word by word from the memory section defined between the First Word Read (FWR) and Last Word
Read (LWR). When the last word is output, the chip will continue with the first word until the transceiver sends a request. If FWR
and LWR are the same, the same word will be sent repetitively. The Listen Window (LIW) is generated before each word to
check if the transceiver is sending data. The LIW has a duration of 320 (160 opt 32) periods of the RF field. FWR and LWR
have to be programmed as valid addresses (FWR
LWR and
33).
The words sent by the EM4450 comprise 32 data bits and parity bits. The parity bits are not stored in the EEPROM, but
generated while the message is sent as described below. The parity is even for rows and columns, meaning that the total
number of "1's" is even (including the parity bit).
Word organisation (Words 0 to 33)
First bit output
Data
D1
D9
D17
D25
PC1
D2
D10
D18
D26
PC2
D3
D11
D19
D27
PC3
D4
D12
D20
D28
PC4
D5
D13
D21
D29
PC5
D6
D14
D22
D30
PC6
Row Even Parity
D7
D15
D23
D31
PC7
P0
P1
P2
P3
0
D0
D8
D16
D24
PC0
Column Even Partiy
Last bit output
logic '0'
Fig. 6
When a word is read protected, the output will consist of 45 bits set to logic "0". The password has to be used to output correctly
a read protected memory area.
Copyright
2014,
EM Microelectronic-Marin SA
4450-DS.doc, Version 4.0, 13-May-14
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