EM MICROELECTRONIC
- MARIN SA
EM6604
Ultra Low Power Multi I/O Microcontroller
Features
•
Low Power - typical 1.7µA active mode
- typical 0.3µA standby mode
@ 1.5V, 32kHz, 25°C
•
Low Voltage - 1.2 to 1.7V
•
buzzer - 2kHz
•
ROM - 1536×16bit (Mask Programmed)
•
RAM
- 72
×
4bit (User Read/Write)
•
2 clocks per instruction cycle
•
RISC architecture
•
3 software configurable 4-bit ports
•
1 input port
•
1 high current output port
•
1 Input or Output port - bitwise
•
Up to 8 outputs
(2 ports)
•
Voltage level detection (1.25V)
•
Timer watchdog
•
8 bit timer
•
Power On Reset - POR
•
Internal interrupt sources (timer,prescaler)
•
External interrupt sources (portA)
Figure 1 Architecture
Description
The EM6604 series is an advanced single chip,
mask programmed low-power low-voltage
CMOS 4-bit microcontroller. It contains ROM,
RAM, timer, prescaler, watchdog timer, voltage
level detector and stepper motor driver
capability. Its low voltage and low power
operation make it the most suitable controller
for battery, stand alone and mobile equipment.
The EM66XX series is manufactured using
EM Microelectronic’s Advanced Low Power
(ALP) CMOS Process.
Figure 2 Pin Configuration
Typical
•
•
•
•
•
•
•
Applications
sensor interfaces
domestic appliances
security systems
detectors
automotive control
clocks
measurement equipment
03.02 REV. D/440
Copyright
2002, EM Microelectronic-Marin SA
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EM6604
EM6604 at a glance
•
Power Supply
- Low Voltage, low power architecture
- Switch between Vdd (output buffers
supply) and VddCA (logic supply)
- 1.2V ... 1.7V battery voltage
- 1.7µA in active mode typ.
@ 1.5V, 25°C
- 0.3µA in standby mode
@ 1.5V, 25°C
- 32 kHz Oscillator
•
4-Bit Input/Output PortC
- separate input or output selection by
metal mask
- direct input read
- Pull-up, Pull-down or none, selectable by
metal mask if used as Input
•
RAM
- 72 x 4 bit, direct addressable
•
Buzzer Output
- separate buzzer output
- 2kHz output or continuous High or Low
•
ROM
- 1536 x 16 bit metal mask programmable
•
Prescaler
- 15 stage system clock divider down to
1 Hz
- 3 interrupt requests : 2Hz/8Hz/128Hz
- Prescaler reset (from 8kHz to 1Hz)
•
CPU
- 4 bit RISC architecture
- 2 clock cycles per instruction
- 72 basic instructions
•
8-bit Timer
- 8-bit auto-reload count-up timer
- 4 timer clocks : 2Hz/8Hz/32Hz/256Hz
- parallel load
- interrupt request when comes to FF hex.
•
Main Operating Modes and Resets
- Active mode
(CPU is running)
- Standby mode
(CPU in Halt)
- Initial reset on Power-On (POR)
- External reset pin
- Watchdog timer (time-out) reset
•
Supply Voltage Level Detector
- Fixed level - 1.25V typical
- Busy flag during measure
- Active only on request to reduce power
consumption
•
4-Bit Input PortA
- Direct input read
- Interrupt request on input’s rising or
falling edge, selectable by metal mask.
- Pull-up, Pull-down or none, selectable by
metal mask
- Software test variables for conditional
jumps
•
4-Bit Output
PortB
- High-current output buffers
- min. 4.5mA at 0.15V voltage drop at
Vdd=1.2V
- differential motor driving capability (a
motor with 180=Ω between two pads of
PortB is driven with at least 4.75mA
•
Interrupt Controller
- 4 external interrupt sources from PortA
- 2 internal interrupt sources, prescaler and
timer
- each interrupt request is individually
maskable
- interrupt request flag is cleared
automatically on register read
- general interrupt request to CPU can be
disabled
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EM6604
Table of Contents
1.
1.1
Operating modes ___________________5
STANDBY M
ODE
_______________________5
Table of Figures
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
EM6604 Architecture ---------------------
Pin Configuration ---------------------------
Typical Configuration ----------------------
EM6604 Mode Transition Diagram -----
Reset Sources and Generation ---------
Port A -----------------------------------------
Port B -----------------------------------------
Example of using PortB for Motor driving
PortC -------------------------------------------
Timer -------------------------------------------
Interrupt Sources and Generation ------
1
1
4
5
5
8
10
10
10
12
13
2. Power Supply _______________________5
3. Reset ______________________________6
3.1 P
OWER
-O
N
-R
ESET
(POR)
CIRCUIT
_______________6
3.2 R
ESET
P
IN
_________________________________6
3.3 W
ATCHDOG
T
IMER
RESET _____________________6
3.4 CPU S
TATE
A
FTER
RESET ____________________6
4. Oscillator ___________________________7
A
BUILT
-
IN CRYSTAL OSCILLATOR CIRCUIT GENERATES THE
SYSTEM OPERATING CLOCK FOR THE
CPU
AND PERIPHERAL
CIRCUITS FROM AN EXTERNALLY CONNECTED CRYSTAL
(
TYP
.
32.768
K
H
Z
). __________________________________7
4.1 P
RESCALER
________________________________7
5. Watchdog Timer _____________________8
Table of Tables
6. Input / Output Ports ___________________8
1.
1.1
3.2
4.1
4.2
5.1
6.1
6.2
6.3
6.4
6.5
6.6
7.1
7.2
8.1
8.2
8.3
8.4
9.1
10.1
13.1
13.2
13.3
6.1 P
ORT
A ___________________________________8
6.2 P
ORT
A R
EGISTERS
___________________________9
6.3 P
ORT
B __________________________________10
6.4 P
ORT
B
REGISTERS
__________________________10
6.5 P
ORT
C __________________________________10
6.6 P
ORT
C
REGISTER
___________________________11
7. Buzzer output ______________________11
7.1 B
UZZER
R
EGISTER
__________________________12
8. Timer _____________________________12
8.1 T
IMER REGISTERS
___________________________13
9. Interrupt controller __________________13
9.1 I
NTERNAL INTERRUPT SOURCES
_________________14
9.2 E
XTERNAL INTERRUPT SOURCES
:
SEE
P
ORT
A
DESCRIPTION
_________________________________14
10. Supply Voltage Level Detector ________14
11. STroBe/RESet ____________________15
12. Test at EM - Active Supply Current test _15
13. EM6604 Metal Mask Options _______16
PA0 input _______________________16
PA0 - IRQ _______________________16
WD timer________________________16
Buzzer __________________________16
15. Electrical specifications______________19
15.1 A
BSOLUTE MAXIMUM RATINGS
__________________19
15.2: S
TANDARD
O
PERATING
C
ONDITIONS
____________19
15.3 H
ANDLING
P
ROCEDURES
_____________________19
15.4: DC
CHARACTERISTICS
- P
OWER
S
UPPLY
P
INS
_____19
15.5: DC
CHARACTERISTICS
- I
NPUT
/O
UTPUT
P
INS
______20
15.6 O
SCILLATOR
______________________________21
Pin Description ------------------------------
StandBy Activities --------------------------
Initial Value After Reset -------------------
Prescaler Interrupt Source ---------- -----
Prescaler control Register ------- ---------
Watchdog Register --------------------------
Input/Output Ports Overview -------------
PortA Input Status Register ---------------
PortA Interrupt Request Register --------
PortA Interrupt Mask Register -----------
PortB Output Register ----------------------
PortC Input/Output Register --------------
Buzzer frequency selection ----------------
Buzzer Control Register -------------------
Timer Clock Selection ----------------------
Timer Control Register --------------------
LOW Timer Load/Status Register ------
HIGH Timer Load/Status Register ------
Interrupt Control Register ------------------
SVLD Control Register --------------------
Input/Output ports option ------------------
PortA interrupt edge option -------------------
Watchdog timer metal option --------------
4
5
6
7
7
7
8
9
9
9
9
10
11
11
12
12
12
13
14
14
15
15
15
16. Pad Location Diagram_______________22
17. Package and Ordering Information _____22
Dimensions of PDIP24 Package __________22
17.1 O
RDERING
I
NFORMATION
_____________________24
17.2 P
ACKAGE
M
ARKING
_________________________24
17.3 C
USTOMER
M
ARKING
_______________________24
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EM6604
Table 1. Pin Description
Pin
Pin Name
1
reset
2
Qout/ocs1
3
Qin/osc2
4
VddCA
5
port A, 0
6
port A, 1
7
port A, 2
8
port A, 3
9
STB/RST
10
Vss
11
port B, 0
12
port B, 1
13
port B, 2
14
port B, 3
15,16
NC
17
Vdd
18
port C, 0
19
port C, 1
20
port C, 2
21
port C, 3
22
Buzzer
23
test
24
Vss
Function
reset input terminal
crystal terminal 1
crystal terminal 2 (input)
Switched logic supply
input 0 port A
input 1 port A
input 2 port A
input 3 port A
strobe/reset status output
negative power supply terminal
output 0 port B
output 1 port B
output 2 port B
output 3 port B
not connected
positive power supply terminal
input / output 0 port C
input / output 1 port C
input / output 2 port C
input / output 3 port C
buzzer output
test input terminal
negative power supply terminal
Remarks
interrupt request; tvar 1
interrupt request; tvar 2
interrupt request; tvar 3
interrupt request
µC reset state + port B & C write
common with pin 24 (note1)
High current output
High current output
High current output
High current output
for EM test purpose only
common with pin 10 (note1)
Note1:
It is recommended that both Vss pins (10 and 24) are connected together.
Figure 3 Typical configuration
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EM6604
Figure 4 Mode transition diagram
1.
Operating modes
The EM6604 has a low power dissipation StandBy
mode.
1.1
STANDBY Mode
Executing a HALT instruction puts the EM6604
into the StandBy mode. The voltage regulator,
oscillator, Watchdog timer, interrupts and timer
are operating. However, the CPU stops since the
clock related to instruction execution stops,
registers, RAM, and I/O pins retain their states
prior to StandBy mode. StandBy is canceled by a
RESET or an Interrupt request, if enabled
.
Table 1.1
shows the state of the EM6604
functions mode.
Table 1.1 STANDBY activities
FUNCTION
Oscillator
Instruction Execution
Registers and Flags
Interrupt Functions
RAM
Timer
Watchdog
I/O pins
Supply VLD
Reset pin
STANDBY
Active
Stopped
Retained
Active
Retained
Active
Active
Active
Stopped
Active
2. Power Supply
Circuit is supplied by single external power
supply between VDD and VSS. Circuit
reference is at VSS (ground). To overcome
problems with high power output buffers when
they are active, internal logic VDDCA can be
switched-off from main VDD
(SW bit set to “1“
in
SwCtr
register)
and is maintained by an
external capacitor. High power outputs are
supplied directly from main VDD.
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2002, EM Microelectronic-Marin SA
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