EM8470
EM8471
MPEG-4 Decoder for Set-top, DVD and Streaming Applications
Description
The EM847x family is a single-chip MPEG audio/video decoder that supports
DVD-Video, Superbit™ DVD, SVCD, VCD and audio CD media formats.
Video decoding support includes MPEG-1, MPEG-2 MP@ML and MPEG-4
advanced simple video profile Level 5
1
. Audio decoding support includes
Dolby
®
Digital, MPEG-1 Layers 1 and 2, MPEG-4 high quality profile Level 2,
and 16-bit linear PCM. DVD-Video support includes hardware CSS decryp-
tion, 16:9 and 4:3 aspect ratios, letterboxing, 3:2 pull-down, multiple angles
and sub-picture.
Based on the company’s award-winning REALmagic
®
Video Streaming Tech-
nology, the EM847x family provides highly-integrated solutions for high-qual-
ity decoding of MPEG-1, MPEG-2 and MPEG-4. Positioned as a cost-
effective solution for streaming video clients, advanced digital set-top boxes
and next-generation interactive DVD players, the EM847x enables manufac-
turers to easily incorporate streaming video, progressive DVD playback and
video-on-demand into their products.
EM8475
EM8476
Common Features
• Pin and functionally compatible with EM8400
(EM8470 and EM8471 only)
• Compatible with MPEG-4 Client Players from
Envivio and iVAST and a wide variety of
MPEG-2 video servers
• Supports ISMA and MPEG-2 streaming
formats, IP multicasting
• Supports DVD-Video, Superbit DVD, SVCD,
VCD, audio CD media formats
• MPEG-1, MPEG-2 MP@ML, MPEG-4
Advanced Simple Profile Level 5
1
video
decoding
• Dolby Digital, MPEG-1 Layers 1 and 2, MPEG-
4 High Quality Profile Level 2, and linear PCM
audio decoding
Block Diagram
4 MB SDRAM
SDRAM C
ONTROLLER
NTSC/PAL
E
NCODER
CCIR 601 / 656
8 / 16-
BIT
YC
B
C
R
I2S
A
UDIO
V
IDEO
I
NPUT
P
ORT
MPEG
V
IDEO
D
ECODER
E
NGINE
D
ISPLAY
C
ONTROL
,
OSD,
S
UB
-
P
ICTURE
V
IDEO
DAC
S
CVBS
S-V
IDEO
A
NALOG
RGB / YP
B
P
R
24-
BIT
RGB,
8 / 16-
BIT
YC
B
C
R
A
UDIO
DAC
S
S
TEREO
A
UDIO
I2S
OR
SPDIF
DVD
D
ECRYPT
A
UDIO
D
ECODER
E
NGINE
L
OCAL
Bus
L
OCAL
B
US
C
ONTROLLER
PCI
H
OST
I
NTERFACE
PCI
Lightly shaded blocks are only available on the EM8475 and EM8476
1
Without 1/4 pixel and global motion compensation
Sigma Designs, Inc.
355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740
www.sigmadesigns.com • sales@sigmadesigns.com
EM8470, EM8471, EM8475, EM8476
Bitstream Demultiplexing
The host processor performs MPEG-4 file demultiplexing and system decod-
ing (except audio and video decoding), MPEG-2 transport and program
stream and MPEG-1 system stream demultiplexing. The EM847x operates as
a PCI bus master while audio and video elementary streams are transferred
from host system memory to EM847x memory by the EM847x’s DMA engine.
Software drivers for the x86, available from Sigma Designs, include MPEG-4
audio decode, MPEG-2 transport and program stream demultiplex, MPEG-1
system stream demultiplex and DVD-Video/SVCD/VCD stream demultiplex
and navigation. Supported operating systems for our x86-based reference
designs include Windows
®
XP Embedded, Windows CE .NET and Linux. For
other operating systems and hardware platforms, our Professional Services
Group can assist in supporting your requirements.
DVD-Video Decryption
The EM847x includes decryption logic and supports DVD-Video CSS proce-
dural specifications. It also fully supports DVD-Video control features includ-
ing up to 8 language sound tracks, 32 subtitle settings, letterbox, pan and
scan, multi-angles and 3:2 pull-down.
Common Features
• Programmable display output with improved
scaling up to 1920x1080 resolution, interlaced
or progressive, up to 120 Hz refresh
• 2-, 4-, 7- or 8-bit OSD with optional run-length
compression, alpha blending and flicker
filtering
• 80 MHz digital video output interface: 8- or 16-
bit CCIR 601 / 656 YCbCr
• Improved NTSC/PAL composite and s-video
outputs with optional Macrovision v7.1
protection and VBI data support (10-bit DACs)
• Digital audio output interface: I2S for PCM or
S/PDIF (IEC 60958) for PCM, compressed
Dolby Digital and compressed DTS
• Improved PCI v2.1 bus master / slave interface
supports both read and write operations
• 2.5V core with 3.3V I/O (5V tolerant) for low
power operation
• Package: 208 PQFP for EM8470 and EM8471
(pin compatible with EM8400), 328 BGA for
EM8475 and EM8476
MPEG Video Decoding
The MPEG video decoder engine contains the following modules used for
MPEG-1, MPEG-2 and MPEG-4 video decoding:
• MPEG-1 & 2 Huffman Decoder
• MPEG-4 Huffman Decoder
• Motion Compensation
• IDCT
• Inverse Quantizer
• AC / DC Predictor
EM8475 / EM8476 Features
• Digital audio input interface: I2S
• 80 MHz digital video input interface: 8- or 16-
bit CCIR 601 / 656 YCbCr supporting
resolutions up to 1920x1080i
• 80 MHz 24-bit digital RGB output interface for
DVI with HDCP support
• Interlaced or progressive analog RGB or
YPbPr video outputs with optional Macrovision
AGC v1.03 protection and VBI data support
(10-bit DACs)
• Stereo audio DACs
• Flexible Local Bus interface
The Huffman Decoder receives bitstream data from DRAM and works in col-
laboration with the internal RISC processor to decode bitstream elements
down to the block level. It then decodes transformed coefficients and sends
them to the Inverse Quantizer. The Inverse Quantizer mainly performs two
consecutive multiplications on the transformed coefficients (quantizer scale
and quantizer matrix) and sends them to the IDCT. The IDCT converts them
into pixels (or pixel differences for non-intra pictures), which are sent to the
Motion Compensation block. The Motion Compensation block loads decoded
macroblocks from DRAM (for prediction), adds the pixel differences and
stores the result back to DRAM.
Applications
• Consumer products needing PVR and
playback of video-on-demand (VOD),
streaming video, progressive DVD
• Set-top boxes, media/home gateways, video
end points, convergence appliances
-2-
Sigma Designs, Inc.
355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740
www.sigmadesigns.com • sales@sigmadesigns.com
EM8470, EM8471, EM8475, EM8476
MPEG-1 and MPEG-2 Huffman Decoder
The MPEG Video Decoder engine uses the Huffman
Decoder as its front end. It can decode either a MPEG-1 or
MPEG-2 formatted data stream. The Huffman Decoder is
commanded directly from the RISC processor. It extracts
fixed-length, variable-length or start codes from the bitstream
and returns the value to the RISC processor or passes it
directly to the Inverse Quantizer. The Huffman Decoder can
also do tasks such as decode the macroblock increment
address, get the macroblock type, get coded block pattern,
get motion vector codes and decode a delta motion vector.
MPEG-4 Huffman Decoder
The MPEG-4 Huffman Decoder is the front-end to the
MPEG-4 engine. It provides specialized instructions to the
RISC processor to enable the decoding of Simple Profile
MPEG-4 streams. These instructions are of three different
kinds: get or view a fixed-length bit field, get an individual
variable length code and get the DCT coefficients for the
whole macroblock. Additionally, the Huffman Decoder pro-
vides support for the error-resiliency features of MPEG-4. It
can be used to read data-partitioned Video Object Planes,
with or without Reversible Variable Length Codes (RVLCs). It
cannot, however, read RVLCs backwards.
AC/DC Predictor
If the input stream is MPEG-1 or MPEG-2, the AC/DC predic-
tor passes through. Otherwise, it receives data from the zig-
zag through a 19-bit stream interface. A predictor is added to
the incoming AC/DC coefficients. The result is saturated and
output to the inverse quantizer through a similar interface.
This result will also be used as future predictors. For predic-
tion, this block must save an entire macroblock line of infor-
mations. This module supports MPEG-4 simple profile.
Inverse Quantizer
The Inverse Quantizer block resides between the AC/DC
predictor block and the inverse DCT block. Its primary func-
tion is to receive coefficients from the AC/DC predictor, scale
them and send them to the IDCT. It supports the MPEG-1,
MPEG-2 MP@ML and MPEG-4 simple profile.
Inverse DCT
The IDCT (Inverse Discrete Cosine Transform) module is a
hardware implementation of the DCT/IDCT of an 8x8 pixel
block used in MPEG compression/ decompression. The DCT
transforms a block of 8x8 pixels into a block of 8x8 trans-
formed coefficients. The IDCT transforms a block of 8x8
transformed coefficients back into a block of 8x8 pixels.
Video Decoder Block Diagram
DRAM
ACDC
_
OUT
MPEG MISC
ACDC
_
IN
AC/DC
P
REDICTOR
SDRAM C
ONTROLLER
T
IMER
IRQ C
NTRL
.
R
ESET
C
NTRL
.
RBUS I
NF
.
Z
IG
Z
AG
MPEG-4
H
UFFMAN
I
NVERSE
Q
UANTIZER
IDCT
MPEG-1&2
H
UFFMAN
R-BUS
M
OTION
C
OMPENSATION
D-BUS
DMEM
PCI BUS
I
NTERFACE
16-
BIT
RISC C
ORE
PMEM
PCI BUS
Sigma Designs, Inc.
355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740
www.sigmadesigns.com • sales@sigmadesigns.com
-3-
EM8470, EM8471, EM8475, EM8476
Motion Compensation Module
The Motion Compensation Module performs all the motion
compensation tasks required to decode MPEG-1, MPEG-2
and MPEG-4 bitstreams. This includes predicting the image
block for the picture being decoded, using pixels from previ-
ously decoded pictures.
Video Display Controller
The display controller reads picture data from DRAM and
displays it with proper format, timing and synchronization sig-
nals. This is a real-time process driven by the video clock.
The display controller operates in one of four modes:
• Master mode -- the display controller generates HSYNC and
VSYNC from an internal or external video clock up to 80
MHz
• Slave mode -- the display controller receives HSYNC and
VSYNC from an internal or external video clock up to 80
MHz
Audio Input and Output Interfaces
The audio decoding block supports the following audio bit-
stream formats:
• Dolby Digital with conformance to Group A (20-bit)
• MPEG-1 Layers 1 and 2
• MPEG-4 CELP and Low Complexity AAC (decoded using
software on x86 host CPU)
• 16-bit linear PCM data
• Compressed Dolby Digital and DTS digital output via
S/PDIF
®
The video display timing can be set for interlaced or non-
interlaced (progressive) video output up to 120 Hz.
Sub-Pictures
Sub-pictures are compressed bit maps overlaid on decoded
MPEG video which can be scrolled up and down and faded
in and out. The area, content, color and contrast in every
video field can be changed. These modifications produce
special effects such as highlighting.
OSD (On-Screen Display)
The OSD enables simple full screen graphical menus to be
displayed and blended with the MPEG decoded video and
sub-picture. It supports 4 palletized color depths: 4 colors (2
bits per pixel), 16 colors (4 bits per pixel), 128 colors (7 bits
per pixel) and 256 colors (8 bits per pixel). The bit map can
be compressed using Run-Length Coding (RLC) in 2-, 4- and
7-bit per pixel modes. A 256x32 color look-up table (CLUT) is
provided to convert the 2-, 4-, 7- or 8-bit code into a 24-bit
YCbCr color and 16 levels of alpha blending. The Highlight
function is supported in 2-, 4- and 7-bit per pixel modes.
The OSD supports programmable 3-line flicker filtering to
improve the graphics quality on interlaced displays.
Letterbox Display
Letterbox mode provides vertical downscaling; 16:9 pictures
can be displayed in a letterbox fashion on a traditional 4:3
display.
Pan and Scan Display
Pan and scan mode expands the video image to 16:9. A sec-
tion of the image can be displayed at full height on a 4:3 TV
display.
I2S Digital Audio Output
The I2S serial audio output block receives either the 2-chan-
nel down-mixed decoded Dolby Digital audio, decoded
MPEG-1 audio, decoded MPEG-4 audio or PCM audio data.
It then converts this data into a serial bitstream compatible
with the I2S specification. The 256x F
s
serial clock is gener-
ated by an internal digital PLL or an external clock source
may be used.
S/PDIF Digital Audio Output
In addition to receiving the same audio data as the I2S digital
audio output block, the S/PDIF output block can receive
compressed DTS and compressed Dolby Digital audio data.
It then converts this data into a serial bitstream compatible
with the S/PDIF specification.
Analog Stereo Audio Output
The EM8475 and EM8476 include two on-chip audio DACs
that receive the same 2-channel information as the I2S digi-
tal output and convert it to analog.
I2S Digital Audio Input
The EM8475 and EM8476 also support an I2S digital audio
input. This audio data may be output onto the I2S or S/PDIF
outputs.
-4-
Sigma Designs, Inc.
355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740
www.sigmadesigns.com • sales@sigmadesigns.com
EM8470, EM8471, EM8475, EM8476
Alpha Blending
Alpha blending provides two layers of blending: sub-picture
over the MPEG video and OSD over both the sub-picture
and MPEG video. Up to 16 levels of blending are available.
Component Analog Output
The EM8475 and EM8476 also include component YPbPr or
RGB analog outputs, with optional Macrovision AGC v1.03
protection in 480p YPbPr mode. This component analog out-
put can be programmed to be either RGB or YPbPr video
data, interlaced or progressive, from NTSC / PAL resolution
up to 1920x1080. The analog video outputs are capable of
driving a doubly-terminated 75-ohm load.
When generating analog RGB or YPbPr video, the compos-
ite video output is always present; the s-video output is not
available.
Supported analog formats are:
• RGB and composite video for SCART support
• RGB with sync on green
• SMPTE GBR
• Betacam YUV
• M-II YUV
• SMPTE YPbPr
Video Input and Output Interfaces
Video output ports provide digital RGB or YCbCr outputs and
include an integrated NTSC/PAL video encoder and video
DACs for composite, s-video and component analog outputs.
VBI Support
NTSC closed captioning on lines 21 and 284 is supported. In
addition, NTSC widescreen signaling (WSS) and copy gen-
eration management (CGMS-A) on lines 20 and 283, as
defined by IEC 61880, is supported. This information speci-
fies the aspect ratio of the current program and also provides
copy protection capabilities.
PAL widescreen signaling (WSS) on line 23, as defined by
ETSI EN300284 and ITU-R BT.1119, is supported. This infor-
mation specifies the aspect ratio of the current program.
Digital Video Output
The digital video output, controlled by the video display con-
troller, supports 8- / 16-bit CCIR 601 / 656 4:2:2 YCbCr data.
An additional 24-bit RGB output mode is supported on the
EM8475 and EM8476. It may be operated as a timing master
or slave at rates up to 80 MHz (160 MBps) and resolutions
up to 720p or 1080i.
The 24-bit RGB output mode supports HDCP (High-band-
width Digital Content Protection) when interfaced to a DVI
transmitter chip.
TV Encoder - Composite and S-Video Output
A high-quality NTSC/PAL encoder (with optional Macrovision
v7.1 protection) that supports the NTSC-M, NTSC-J, PAL-
B/D/G/H/I, PAL-60 and PAL-M baseband video standards is
available. It features three 10-bit video DACs to generate
simultaneous composite and s-video outputs. The analog
video outputs are capable of driving a doubly-terminated 75-
ohm load.
If copy protection is used during DVD-Video playback, the
resolution on the EM8475 analog YPbPr / RGB outputs may
not be higher than standard definition (720x480 or 720x576)
unless driving a VGA monitor. If the output is configured to
be progressive YPbPr, only 480p video may be generated.
Digital Video Input
The video input port, available only on the EM8475 and
EM8476, is designed to capture video data in 8- / 16-bit
CCIR 601 / 656 YCbCr video data formats. The capture port
must operate in slave mode, synchronized to the input clock
and sync signals. The capture port is designed to support
video rates up to 80 MHz (160 MBps) and resolutions up to
720p or 1080i.
This input may be converted to progressive using either field
merging or scan line interpolation.
Note that only one video stream can be displayed at a time -
either MPEG video or input video.
Sigma Designs, Inc.
355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740
www.sigmadesigns.com • sales@sigmadesigns.com
-5-
