EN25P64
Purpose
Eon Silicon Solution Inc. (hereinafter called “Eon”) is going to provide its products’ top marking on
ICs with < cFeon > from January 1st, 2009, and without any change of the part number and the
compositions of the ICs. Eon is still keeping the promise of quality for all the products with the
same as that of Eon delivered before. Please be advised with the change and appreciate your
kindly cooperation and fully support Eon’s product family.
Eon products’ New Top Marking
cFeon Top Marking Example:
cFeon
Part Number: XXXX-XXX
Lot Number: XXXXX
Date Code: XXXXX
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as an Eon product. Any
changes that have been made are the result of normal data sheet improvement and are noted in
the document revision summary, where supported. Future routine revisions will occur when
appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
Eon continues to support existing part numbers beginning with “Eon” and “cFeon” top marking. To
order these products, during the transition please specify “Eon top marking” or “cFeon top marking”
on your purchasing orders.
For More Information
Please contact your local sales office for additional information about Eon memory solutions.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
1
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com.
Rev. D, Issue Date: 2009/1/8
EN25P64
EN25P64
64 Megabit Uniform Sector, Serial Flash Memory
FEATURES
•
Single power supply operation
- Full voltage range: 2.7-3.6 volt
•
Serial Interface Architecture
- SPI Compatible: Mode 0 and Mode 3
•
64 M-bit Serial Flash
- 64 M-bit/8192 K-byte/32768 pages
- 256 bytes per programmable page
•
High performance
- 100MHz clock rate
•
Low power consumption
- 12 mA typical active current
- 1
μA
typical power down current
•
Uniform Sector Architecture:
- One hundred twenty-eight 64-Kbyte sectors
•
Software and Hardware Write Protection:
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
•
-
-
-
-
High performance program/erase speed
Byte program time: 7µs typical
Page program time: 1.5ms typical
Sector erase time: 800ms typical
Chip erase time: 50 Seconds typical
•
Lockable 512byte OTP security sector
•
Minimum 100K endurance cycle
•
Package Options
- 16 pins SOP 300mil body width
- All Pb-free packages are RoHS compliant
•
Industrial temperature Range
GENERAL DESCRIPTION
The EN25P64 is a 64M-bit (8192K-byte) Serial Flash memory, with advanced write protection
mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to
256 bytes at a time, using the Page Program instruction.
The EN25P64 is designed to allow either single Sector/Block at a time or full chip erase operation. The
EN25P64 can be configured to protect part of the memory as the software protected mode. The device can
sustain a minimum of 100K program/erase cycles on each sector or block.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com.
Rev. D, Issue Date: 2009/1/8
EN25P64
Figure.1 CONNECTION DIAGRAMS
16 - LEAD SOP
Figure 2. BLOCK DIAGRAM
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com.
Rev. D, Issue Date: 2009/1/8
EN25P64
SIGNAL DESCRIPTION
Serial Data Input (DI)
The SPI Serial Data Input (DI) pin provides a means for instructions, addresses and data to be serially
written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK) input pin.
Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See
SPI Mode")
Chip Select (CS#)
The SPI Chip Select (CS#) pin enables and disables device operation. When CS# is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When CS# is brought low the device will be selected, power consumption will increase to
active levels and instructions can be written to and data read from the device. After power-up, CS#
must transition from high to low before a new instruction will be accepted.
Hold (HOLD#)
The HOLD pin allows the device to be paused while it is actively selected. When HOLD is brought low,
while CS# is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be
ignored (don’t care). The hold function can be useful when multiple devices are sharing the same SPI
signals.
Write Protect (WP#)
The Write Protect (WP#) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP0, BP1and BP2) bits and Status Register
Protect (SRP) bits, a portion or the entire memory array can be hardware protected.
Table 1. PIN Names
Symbol
CLK
DI
DO
CS#
WP#
HOLD#
Vcc
Vss
Pin Name
Serial Clock Input
Serial Data Input
Serial Data Output
Chip Enable
Write Protect
Hold Input
Supply Voltage (2.7-3.6V)
Ground
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com.
Rev. D, Issue Date: 2009/1/8
EN25P64
MEMORY ORGANIZATION
The memory is organized as:
8,388,608 bytes
Uniform Sector Architecture
One hundred twenty-eight 64-Kbyte sectors
32768 pages (256 bytes each)
Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector or
Bulk Erasable but not Page Erasable.
Table 2 Block Sector Architecture
Sector
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
SECTOR SIZE (KByte)
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
5
Address range
7F0000h – 7FFFFFh
7E0000h – 7EFFFFh
7D0000h – 7DFFFFh
7C0000h – 7CFFFFh
7B0000h – 7BFFFFh
7A0000h – 7AFFFFh
790000h – 79FFFFh
780000h – 78FFFFh
770000h – 77FFFFh
760000h – 76FFFFh
750000h – 75FFFFh
740000h – 74FFFFh
730000h – 73FFFFh
720000h – 72FFFFh
710000h – 71FFFFh
700000h – 70FFFFh
6F0000h – 6FFFFFh
6E0000h – 6EFFFFh
6D0000h – 6DFFFFh
6C0000h – 6CFFFFh
6B0000h – 6BFFFFh
6A0000h – 6AFFFFh
690000h – 69FFFFh
680000h – 68FFFFh
670000h – 67FFFFh
660000h – 66FFFFh
650000h – 65FFFFh
640000h – 64FFFFh
630000h – 63FFFFh
620000h – 62FFFFh
610000h – 61FFFFh
600000h – 60FFFFh
5F0000h – 5FFFFFh
5E0000h – 5EFFFFh
5D0000h – 5DFFFFh
5C0000h – 5CFFFFh
5B0000h – 5BFFFFh
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
Rev. D, Issue Date: 2009/1/8
嵌入式系统
