EN29LV512
EN29LV512
512 Kbit (64K x 8-bit ) Uniform Sector,
CMOS 3.0 Volt-only Flash Memory
FEATURES
•
Single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
operations for battery-powered applications.
- Regulated voltage range: 3.0-3.6 volt read
and write operations for high performance
3.3 volt microprocessors.
•
High performance
- Full voltage range: access times as fast as 55
ns
- Regulated voltage range: access times as fast
as 45ns
•
Low power consumption (typical values at 5
MHz)
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1
µA
typical standby current (standard access
time to active mode)
•
-
-
-
-
Flexible Sector Architecture:
Four 16 Kbyte sectors
Supports full chip erase
Individual sector erase supported
Sector protection and unprotection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
•
High performance program/erase speed
- Byte program time: 8µs typical
- Sector erase time: 500ms typical
•
JEDEC Standard program and erase
commands
•
JEDEC standard
DATA
polling and toggle bits
feature
•
Single Sector and Chip Erase
•
Embedded Erase and Program Algorithms
•
Erase Suspend / Resume modes:
Read or program another Sector during
Erase Suspend Mode
•
triple-metal double-poly triple-well CMOS Flash
Technology
•
Low Vcc write inhibit < 2.5V
•
>100K program/erase endurance cycle
da0.
•
Package options
- 8mm x 20mm 32-pin TSOP (Type 1)
- 8mm x 14mm 32-pin TSOP (Type 1)
- 32-pin PLCC
-
•
Commercial and industrial Temperature Range
GENERAL DESCRIPTION
The EN29LV512 is a 512-Kbit, electrically erasable, read/write non-volatile flash memory, organized
as 65,536 bytes. Any byte can be programmed typically in 8µs. The EN29LV512 features 3.0V
voltage read and write operation, with access times as fast as 45ns to eliminate the need for WAIT
states in high-performance microprocessor systems.
The EN29LV512 has separate Output Enable (
OE
), Chip Enable (
CE
), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05
EN29LV512
CONNECTION DIAGRAMS
TABLE 1. PIN DESCRIPTION
FIGURE 1. LOGIC DIAGRAM
Pin Name
A0-A15
DQ0-DQ7
WE#
CE#
OE#
Vcc
Vss
Function
Addresses
8 Data Inputs/Outputs
Write Enable
Chip Enable
Output Enable
Supply Voltage
Ground
CE#
OE#
WE#
A0 - A15
DQ0 – DQ7
EN29LV512
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05
EN29LV512
TABLE 2. UNIFORM BLOCK SECTOR ARCHITECTURE
Sector
3
2
1
0
ADDRESSES
0C000h – 0FFFFh
08000h – 0BFFFh
04000h - 07FFFh
00000h - 03FFFh
SIZE (Kbytes)
16
16
16
16
A15
1
1
0
0
A14
1
0
1
0
PRODUCT SELECTOR GUIDE
Product Number
Speed Option
Regulated Voltage Range: Vcc=3.0-3.6 V
Full Voltage Range: Vcc=2.7 – 3.6 V
-45R
-55
45
45
25
55
55
30
-70
70
70
30
-90
90
90
35
EN29LV512
Max Access Time, ns (t
acc
)
Max CE# Access, ns (t
ce
)
Max OE# Access, ns (t
oe
)
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05
EN29LV512
BLOCK DIAGRAM
Vcc
Vss
Block Protect Switches
DQ0-DQ7
Erase Voltage Generator
State
Control
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Input/Output Buffers
WE#
Command
Register
CE#
OE#
Data Latch
Y-Decoder
Address Latch
STB
Y-Gating
Vcc Detector
Timer
X-Decoder
Cell Matrix
A0-A15
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05
EN29LV512
TABLE 3. OPERATING MODES
512K FLASH USER MODE TABLE
Operation
Read
Write
CMOS Standby
TTL Standby
Output Disable
Sector Protect
2
Sector
Unprotect
2
CE#
L
L
V
cc
±
0.3V
H
L
L
L
OE#
L
H
X
X
H
H
H
WE#
H
L
X
X
H
L
L
A0-A15
A
IN
A
IN
X
X
X
Sector address,
A6=L, A1=H, A0=L
Sector address,
A6=H, A1=H, A0=L
DQ0-DQ7
D
OUT
D
IN
High-Z
High-Z
High-Z
D
IN
, D
OUT
D
IN
, D
OUT
Notes:
1. L=logic low= V
IL
, H=Logic High= V
IH
, V
ID
=11
±
0.5V, X=Don’t Care (either L or H, but not floating!),
D
IN
=Data In, D
OUT
=Data Out, A
IN
=Address In
2. Sector protection/unprotection can be implemented by programming equipment.
TABLE 4. DEVICE IDENTIFICTION (Autoselect Codes)
512K FLASH MANUFACTURER/DEVICE ID TABLE
A15
to
A14
X
X
A13
to
A10
X
X
2
Description
Manufacturer
ID: Eon
Device ID
Sector
Protection
Verification
CE#
L
L
OE#
L
L
WE#
H
H
A9
A8
H
1
A7
X
X
A6
L
L
A5
to
A2
X
X
A1
L
L
A0
L
H
DQ7 to DQ0
1Ch
6Fh
01h
(Protected)
V
ID
V
ID
X
L
L
H
SA
X
V
ID
X
X
L
X
H
L
00h
(Unprotected)
Note:
1. A8=H is recommended for manufacture ID check. If a manufacture ID is read with A8=L, the chip will output a configuration
code 7Fh.
2. A9 = VID is for HV A9 Autoselect mode only. A9 must be
≤
Vcc (CMOS logic level) for Command Autoselect Mode.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05
