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Arria II Device Handbook Volume 3: Device Datasheet and Addendum
December 2013
Subscribe
1–2
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
c
Conditions beyond those listed in
Table 1–1
and
Table 1–2
may cause permanent
damage to the device. Additionally, device operation at the absolute maximum
ratings for extended periods of time may have adverse effects on the device.
Table 1–1
lists the absolute maximum ratings for Arria II GX devices.
Table 1–1. Absolute Maximum Ratings for Arria II GX Devices
Symbol
V
CC
V
CCCB
V
CCBAT
V
CCPD
V
CCIO
V
CCD_PLL
V
CCA_PLL
V
I
I
OUT
V
CCA
V
CCL_GXB
V
CCH_GXB
T
J
T
STG
Description
Supplies power to the core, periphery, I/O registers, PCI Express
®
(PIPE) (PCIe) HIP block, and transceiver PCS
Supplies power for the configuration RAM bits
Battery back-up power supply for design security volatile key register
Supplies power to the I/O pre-drivers, differential input buffers, and
MSEL circuitry
Supplies power to the I/O banks
Supplies power to the digital portions of the PLL
Supplies power to the analog portions of the PLL and device-wide
power management circuitry
DC input voltage
DC output current, per pin
Supplies power to the transceiver PMA regulator
Supplies power to the transceiver PMA TX, PMA RX, and clocking
Supplies power to the transceiver PMA output (TX) buffer
Operating junction temperature
Storage temperature (no bias)
Minimum
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–25
—
—
—
–55
–65
Maximum
1.35
1.8
3.75
3.75
3.9
1.35
3.75
4.0
40
3.75
1.21
1.8
125
150
Unit
V
V
V
V
V
V
V
V
mA
V
V
V
°C
°C
Table 1–2
lists the absolute maximum ratings for Arria II GZ devices.
Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 1 of 2)
Symbol
V
CC
V
CCCB
V
CCPGM
V
CCAUX
V
CCBAT
V
CCPD
V
CCIO
V
CC_CLKIN
V
CCD_PLL
V
CCA_PLL
V
I
I
OUT
Description
Supplies power to the core, periphery, I/O registers, PCIe HIP block, and
transceiver PCS
Power supply to the configuration RAM bits
Supplies power to the configuration pins
Auxiliary supply
Supplies battery back-up power for design security volatile key register
Supplies power to the I/O pre-drivers, differential input buffers, and
MSEL circuitry
Supplies power to the I/O banks
Supplies power to the differential clock input
Supplies power to the digital portions of the PLL
Supplies power to the analog portions of the PLL and device-wide
power management circuitry
DC input voltage
DC output current, per pin
Minimum
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-25
Maximum
1.35
1.8
3.75
3.75
3.75
3.75
3.9
3.75
1.35
3.75
4.0
40
Unit
V
V
V
V
V
V
V
V
V
V
V
mA
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
December 2013 Altera Corporation
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
1–3
Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 2 of 2)
Symbol
V
CCA_L
V
CCA_R
V
CCHIP_L
V
CCR_L
V
CCR_R
V
CCT_L
V
CCT_R
V
CCL_GXBLn
(1)
V
CCL_GXBRn
(1)
V
CCH_GXBLn
(1)
V
CCH_GXBRn
(1)
T
J
T
STG
Description
Supplies transceiver high voltage power (left side)
Supplies transceiver high voltage power (right side)
Supplies transceiver HIP digital power (left side)
Supplies receiver power (left side)
Supplies receiver power (right side)
Supplies transmitter power (left side)
Supplies transmitter power (right side)
Supplies power to the transceiver PMA TX, PMA RX, and clocking (left
side)
Supplies power to the transceiver PMA TX, PMA RX, and clocking (right
side)
Supplies power to the transceiver PMA output (TX) buffer (left side)
Supplies power to the transceiver PMA output (TX) buffer (right side)
Operating junction temperature
Storage temperature (no bias)
Minimum
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-55
-65
Maximum
3.75
3.75
1.35
1.35
1.35
1.35
1.35
1.35
1.35
1.8
1.8
125
150
Unit
V
V
V
V
V
V
V
V
V
V
V
°C
°C
Note to
Table 1–2:
(1) n = 0, 1, or 2.
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage shown in
Table 1–3
and
undershoot to –2.0 V for magnitude of currents less than 100 mA and periods shorter
than 20 ns.
Table 1–3
lists the Arria II GX and GZ maximum allowed input overshoot voltage and
the duration of the overshoot voltage as a percentage over the device lifetime. The
maximum allowed overshoot duration is specified as a percentage of high-time over
the lifetime of the device. A DC signal is equivalent to 100% duty cycle. For example,
a signal that overshoots to 4.3 V can only be at 4.3 V for 5.41% over the lifetime of the
device; for a device lifetime of 10 years, this amounts to 5.41/10ths of a year.
December 2013
Altera Corporation
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
1–4
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
Table 1–3. Maximum Allowed Overshoot During Transitions for Arria II Devices
Symbol
Description
Condition (V)
4.0
4.05
4.1
4.15
4.2
4.25
V
I
(AC)
AC Input Voltage
4.3
4.35
4.4
4.45
4.5
4.55
4.6
Overshoot Duration as % of
High Time
100.000
79.330
46.270
27.030
15.800
9.240
5.410
3.160
1.850
1.080
0.630
0.370
0.220
Unit
%
%
%
%
%
%
%
%
%
%
%
%
%
Maximum Allowed I/O Operating Frequency
Table 1–4
lists the maximum allowed I/O operating frequency for Arria II GX I/Os
using the specified I/O standards to ensure device reliability.
Table 1–4. Maximum Allowed I/O Operating Frequency for Arria II GX Devices
I/O Standard
HSTL-18 and HSTL-15
SSTL -15
SSTL-18
2.5-V LVCMOS
3.3-V and 3.0-V LVTTL
3.3-V, 3.0-V, 1.8-V, and 1.5-V LVCMOS
PCI and PCI-X
SSTL-2
1.2-V LVCMOS HSTL-12
200
250
I/O Frequency (MHz)
333
400
333
260
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
December 2013 Altera Corporation
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
1–5
Recommended Operating Conditions
This section lists the functional operation limits for AC and DC parameters for
Arria II GX and GZ devices. All supplies are required to monotonically reach their
full-rail values without plateaus within t
RAMP
.
Table 1–5
lists the recommended operating conditions for Arria II GX devices.
Table 1–5. Recommended Operating Conditions for Arria II GX Devices
(Note 1)
(Part 1 of 2)
Symbol
V
CC
V
CCCB
V
CCBAT
(2)
V
CCPD
(3)
Description
Supplies power to the core, periphery, I/O
registers, PCIe HIP block, and transceiver
PCS
Supplies power to the configuration RAM
bits
Battery back-up power supply for design
security volatile key registers
Supplies power to the I/O pre-drivers,
differential input buffers, and MSEL
circuitry
Condition
—
Minimum
0.87
Typical
0.90
Maximum
0.93
Unit
V
—
—
—
—
—
—
—
—
—
—
—
1.425
1.2
3.135
2.85
2.375
3.135
2.85
2.375
1.71
1.425
1.14
0.87
1.50
—
3.3
3.0
2.5
3.3
3.0
2.5
1.8
1.5
1.2
0.90
1.575
3.3
3.465
3.15
2.625
3.465
3.15
2.625
1.89
1.575
1.26
0.93
V
V
V
V
V
V
V
V
V
V
V
V
V
CCIO
Supplies power to the I/O banks
(4)
V
CCD_PLL
V
CCA_PLL
V
I
V
O
V
CCA
V
CCL_GXB
V
CCH_GXB
T
J
Supplies power to the digital portions of the
PLL
Supplies power to the analog portions of
the PLL and device-wide power
management circuitry
DC Input voltage
Output voltage
Supplies power to the transceiver PMA
regulator
Supplies power to the transceiver PMA TX,
PMA RX, and clocking
Supplies power to the transceiver PMA
output (TX) buffer
Operating junction temperature
—
—
—
—
—
—
—
Commercial
Industrial
2.375
–0.5
0
2.375
1.045
1.425
0
–40
2.5
—
—
2.5
1.1
1.5
—
—
2.625
3.6
V
CCIO
2.625
1.155
1.575
85
100
V
V
V
V
V
V
°C
°C
December 2013
Altera Corporation
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
随着微型化程度不断提高，元件和布线技术也取得巨大发展，例如BGA外壳封装的高集成度的微型IC，以及导体之间的绝缘间距缩小到0.5mm，这些仅是其中的两个例子。电子元件的布线设计方式，对以后制作流程中的测试能否很好进行，影响越来越大。下面介绍几种重要规则及实用提示。 通过遵守一定的规程（DFT-Design for Testability，可测试的设计），可以大大减少生产测试的准备和实...[详细]
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