eGaN® FET DATASHEET
EPC2102
V
DS
, 60 V
R
DS(on)
, 4.9 mΩ
I
D
, 30 A
EPC2102 – Enhancement-Mode GaN Power
Transistor Half-Bridge
EFFICIENT POWER CONVERSION
HAL
Gallium Nitride’s exceptionally high electron mobility and low temperature coefficient allows very
low R
DS(on)
, while its lateral device structure and majority carrier diode provide exceptionally low Q
G
and zero Q
RR
. The end result is a device that can handle tasks where very high switching frequency,
and low on-time are beneficial as well as those where on-state losses dominate.
Maximum Ratings
DEVICE
V
DS
Q1
&
Q2
I
D
V
GS
T
J
T
STG
PARAMETER
Drain-to-Source Voltage (Continuous)
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C)
Continuous (T
A
= 25˚C, R
θJA
= 15°C/W)
Pulsed (25°C, T
PULSE
= 300 µs)
Gate-to-Source Voltage
Gate-to-Source Voltage
Operating Temperature
Storage Temperature
VALUE
60
72
30
220
6
-4
–40 to 150
–40 to 150
UNIT
V
A
V
°C
EPC2102 eGaN® ICs are supplied only in
passivated die form with solder bumps
Die Size: 6.05 mm x 2.3 mm
Applications
• High Frequency DC-DC
Benefits
• High Frequency Operation
• Ultra High Efficiency
Thermal Characteristics
PARAMETER
Q1
&
Q2
R
0JC
R
0JB
R
0JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Board
Thermal Resistance, Junction to Ambient (Note 1)
TYP
0.3
2.2
42
UNIT
°C/W
• High Density Footprint
Note 1: R
θJA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See
http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf
for details
www.epc-co.com/epc/Products/eGaNFETsandICs/EPC2102.aspx
Static Characteristics
DEVICE
BV
DSS
I
DSS
Q1
&
Q2
I
GSS
V
GS(TH)
R
DS(on)
V
SD
PARAMETER
Drain-to-Source Voltage
Drain-Source Leakage
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Threshold Voltage
Drain-Source On Resistance
Source-Drain Forward Voltage
TEST CONDITIONS
V
GS
= 0 V, I
D
= 0.6 mA
V
DS
= 48 V, V
GS
= 0 V
V
GS
= 5 V
V
GS
= -4 V
V
DS
= V
GS
, I
D
= 7 mA
V
GS
= 5 V, I
D
= 20 A
I
S
= 0.5 A, V
GS
= 0 V
MIN
60
TYP
0.008
0.015
0.008
MAX
0.4
7
0.4
2.5
4.9
UNIT
V
mA
mA
mA
V
mΩ
V
0.8
1.3
3.6
1.7
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eGaN® FET DATASHEET
Dynamic Characteristics
DEVICE
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
Q1
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
Q2
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
EPC2102
PARAMETER
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance, Energy Related (Note 2)
Effective Output Capacitance, Time Related (Note 3)
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance, Energy Related (Note 2)
Effective Output Capacitance, Time Related (Note 3)
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
TEST CONDITIONS
V
DS
= 30 V, V
GS
= 0 V
MIN
TYP
850
11
500
MAX
1020
UNIT
750
pF
V
DS
= 0 to 30 V, V
GS
= 0 V
V
DS
= 30 V, V
GS
= 5 V, I
D
= 20 A
695
863
8
2.5
11
V
DS
= 30 V, I
D
= 20 A
1.5
1.7
nC
39
V
DS
= 30 V, V
GS
= 0 V
26
0
850
1020
V
DS
= 30 V, V
GS
= 0 V
11
610
915
pF
V
DS
= 0 to 30 V, V
GS
= 0 V
V
DS
= 30 V, V
GS
= 5 V, I
D
= 20 A
830
1030
8
2.5
11
V
DS
= 30 V, I
D
= 20 A
1.5
1.7
nC
47
V
DS
= 30 V, V
GS
= 0 V
31
0
Note 2: C
OSS(ER)
is a fixed capacitance that gives the same stored energy as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Note 3: C
OSS(TR)
is a fixed capacitance that gives the same charging time as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Figure 1 (Q1 & Q2): Typical Output Characteristics at 25°C
200
V
GS
= 5 V
V
GS
= 4 V
200
Figure 2 (Q1 & Q2): Transfer Characteristics
25˚C
125˚C
I
D
–
Drain Current (A)
V
GS
= 2 V
100
I
D
–
Drain Current (A)
150
V
GS
= 3 V
150
V
DS
= 3 V
100
50
50
0
0
0.5
V
DS
–
Drain-to-Source Voltage (V)
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
V
GS
– Gate-to-Source Voltage (V)
2.0
2.5
3.0
3.5
4.0
4.5
5.0
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eGaN® FET DATASHEET
Figure 3 (Q1 & Q2): R
DS(on)
vs. V
GS
for Various Drain Currents
R
DS(on)
– Drain-to-Source Resistance (m )
EPC2102
Figure 4 (Q1 & Q2): R
DS(on)
vs. V
GS
for Various Temperatures
R
DS(on)
– Drain-to-Source Resistance (m )
12
I
D
= 10 A
I
D
= 20 A
I
D
= 30 A
I
D
= 40 A
12
25˚C
125˚C
I
D
= 20 A
8
8
4
4
0
2.5
3.0
3.5
4.0
4.5
5.0
0
2.5
3.0
V
GS
– Gate-to-Source Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
3.5
4.0
4.5
5.0
Figure 5a (Q1): Capacitance (Linear Scale)
2000
1000
1500
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
Figure 5b (Q1): Capacitance (Log Scale)
Capacitance (pF)
Capacitance (pF)
100
1000
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
500
10
0
0
20
40
60
1
V
DS
– Drain-to-Source Voltage (V)
0
20
40
60
V
DS
– Drain-to-Source Voltage (V)
Figure 5c (Q2): Capacitance (Linear Scale)
2000
1000
1500
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
Figure 5d (Q2): Capacitance (Log Scale)
Capacitance (pF)
Capacitance (pF)
100
1000
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
500
10
0
0
20
40
60
1
V
DS
– Drain-to-Source Voltage (V)
0
20
40
60
V
DS
– Drain-to-Source Voltage (V)
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eGaN® FET DATASHEET
Figure 6a (Q1): Output Charge and C
OSS
Stored Energy
40
1.2
EPC2102
Figure 6b (Q2): Output Charge and C
OSS
Stored Energy
50
1.5
E
OSS
–
C
OSS
Stored Energy ( J)
30
0.9
20
0.6
20
0.6
10
0.3
10
0.3
0
0
20
40
60
0.0
0
V
DS
– Drain-to-Source Voltage (V)
0
20
40
60
0.0
V
DS
– Drain-to-Source Voltage (V)
Figure 7 (Q1 & Q2): Gate Charge
5
Figure 8 (Q1 & Q2): Reverse Drain-Source Characteristics
200
V
GS
– Gate-to-Source Voltage (V)
I
SD
– Source-to-Drain Current (A)
4
I
D
= 20 A
V
DS
= 30 V
150
25˚C
125˚C
3
V
DS
= 0 V
GS
3
2
100
1
50
0
0
2
Q
G
– Gate Charge (nC)
4
6
8
0
0
0.5
1.0
V
SD
– Source-to-Drain Voltage (V)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Figure 9 (Q1 & Q2):
Normalized On-State Resistance vs. Temperature
2.0
Figure 10 (Q1 & Q2):
Normalized Threshold Voltage vs. Temperature
1.4
1.3
Normalized On-State Resistance R
DS(on)
Normalized Threshold Voltage
1.8
1.6
1.4
1.2
1.0
0.8
I
D
= 20 A
V
GS
= 5 V
1.2
1.1
1.0
0.9
0.8
0.7
I
D
= 7 mA
0
25
T
J
– Junction Temperature (°C)
50
75
100
125
150
0.6
0
25
T
J
– Junction Temperature (°C)
50
75
100
125
150
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E
OSS
–
C
OSS
Stored Energy ( J)
Q
OSS
–
Output Charge (nC)
Q
OSS
–
Output Charge (nC)
30
0.9
40
1.2
eGaN® FET DATASHEET
EPC2102
Z
θJB
, Normalized Thermal Impedance
Figure 11a
Transient Thermal
Response Curves
Transient Thermal Response Curves (Junction-to-Board)
1
Duty Cycle:
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
P
DM
t
1
t
2
Single Pulse
0.001
10
-5
10
-4
Notes:
Duty Factor: D = t
1
/t
2
Peak T
J
= P
DM
x Z
θJB
x R
θJB
+ T
B
10
-3
10
-2
10
-1
1
10
1
t
p
, Rectangular Pulse Duration, seconds
Z
θJC
, Normalized Thermal Impedance
Figure 11b
Transient Thermal
Response Curves
Transient Thermal Response Curves (Junction-to-Case)
1
Duty Cycle:
0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
t
1
Notes:
Duty Factor: D = t
1
/t
2
Peak T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
0.01
0.001
10
-6
Single Pulse
10
-5
10
-4
10
-3
10
-2
10
-1
1
t
p
, Rectangular Pulse Duration, seconds
Figure 12 (Q1 & Q2): Safe Operating Area
1000
Figure 13: Typical Application Circuit
V
IN
+
V
IN
Gate 1
GR1
Q
1
V
SW
Q
2
P
GND
_
_
V
OUT
+
R
Load
I
D
– Drain Current (A)
100
Gate driver/
controller
eGaNIC
10
Limited by R
DS(on)
Pulse Width
1 ms
250 µs
100 µs
1
10
100
VB
HO
VS
VCC
GND
LO
1
Gate 2
0.1
0.1
V
DS
– Drain-Source Voltage (V)
T
J
= Max Rated, T
C
= +25°C, Single Pulse
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