eGaN® FET DATASHEET
EPC2107
V
DSS
, 100 V
R
DS(on)
, 390 mΩ
I
D
, 1.7 A
EPC2107 – Enhancement-Mode GaN Power
Transistor Half-Bridge with Integrated
Synchronous Bootstrap
EFFICIENT POWER CONVERSION
HAL
Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment
leveraging the infrastructure that has been developed over the last 60 years. GaN’s exceptionally
high electron mobility and low temperature coefficient allows very low R
DS(on)
, while its lateral
device structure and majority carrier diode provide exceptionally low Q
G
and zero Q
RR
. The end
result is a device that can handle tasks where very high switching frequency, and low on-time are
beneficial as well as those where on-state losses dominate.
Maximum Ratings
DEVICE
V
DS
I
D
V
GS
T
J
T
STG
V
DS
I
D
Q3
V
GS
T
J
T
STG
PARAMETER
Drain-to-Source Voltage (Continuous)
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C)
Continuous (T
A
= 25˚C, R
θJA
= 60°C/W)
Pulsed (25°C, T
PULSE
= 300 µs)
Gate-to-Source Voltage
Gate-to-Source Voltage
Operating Temperature
Storage Temperature
Drain-to-Source Voltage (Continuous)
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C)
Continuous (T
A
= 25˚C, R
θJA
= 100°C/W)
Pulsed (25°C, T
PULSE
= 300 µs)
Gate-to-Source Voltage
Operating Temperature
Storage Temperature
Storage Temperature
VALUE
100
120
1.7
3.8
6
–4
–40 to 150
–40 to 150
100
120
0.5
0.5
6
–40 to 150
–40 to 150
–40 to 150
UNIT
V
A
V
°C
V
A
V
°C
EPC2107 eGaN® ICs are supplied only in
passivated die form with solder bumps
Die Size: 1.35 mm x 1.35 mm
Applications
• High Frequency DC-DC Conversion
• Class-D Audio
• Wireless Power
(Highly Resonant and Inductive)
Benefits
• Ultra High Efficiency
• Ultra Low R
DS(on)
• Ultra Low Q
G
• Ultra Small Footprint
www.epc-co.com/epc/Products/eGaNFETsandICs/EPC2107.aspx
Q1
&
Q2
D
BTST
6
G
upper
1
Positive
7
Thermal Characteristics
PARAMETER
R
0JC
R
0JB
R
0JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Board
Thermal Resistance, Junction-to-Ambient (Note 1)
TYP
6
33
81
UNIT
°C/W
S
BTST
9
Q
1
Q
3
D
Grev
Q
2
G
BTST
3
4
5
Out
1
Out
2
Note 1: R
θJA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See
http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details
G
lower
2
Ground
8
EPC2107 – Detailed Schematic
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018 |
| 1
eGaN® FET DATASHEET
DEVICE
BV
DSS
I
DSS
Q1 & Q2
I
GSS
V
GS(TH)
R
DS(on)
V
SD
BV
DSS
I
DSS
I
GSS
V
F
V
GS(TH)
R
DS(on)
V
SD
EPC2107
Static Characteristics (T
J
= 25˚C unless otherwise stated)
PARAMETER
TEST CONDITIONS
Drain-to-Source Voltage
Drain-Source Leakage
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Threshold Voltage
Drain-Source On Resistance
Source-Drain Forward Voltage
Drain-to-Source Voltage
Drain-Source Leakage
Gate-to-Source Forward Leakage
Source-Gate Forward Voltage
Gate Threshold Voltage
Drain-Source On Resistance
Source-Drain Forward Voltage
V
GS
= 0 V, I
D
= 0.3 mA
V
DS
= 80 V, V
GS
= 0 V
V
GS
= 5 V
V
GS
= -4 V
V
DS
= V
GS
, I
D
= 0.1 mA
V
GS
= 5 V, I
D
= 2 A
I
S
= 0.5 A, V
GS
= 0 V
V
GS
= 0 V, I
D
= 0.125 mA
V
DS
= 80 V, V
GS
= 0 V
V
GS
= 5 V
I
F
= 0.2 mA, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 0.1 mA
V
GS
= 5 V, I
D
= 0.05 A
I
S
= 0.1 A, V
GS
= 0 V
MIN
100
TYP
0.05
0.1
0.05
1.6
250
2.5
0.02
0.1
MAX
0.25
1
0.25
2.5
390
UNIT
V
mA
mA
mA
V
mΩ
V
V
mA
mA
V
V
mΩ
V
0.8
100
0.1
1
2.7
2.5
3300
Q3
0.8
1.7
2100
2.9
DEVICE
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
Q1
R
G
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
R
G
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
R
G
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
Dynamic Characteristics (T
J
= 25˚C unless otherwise stated)
PARAMETER
TEST CONDITIONS
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance, Energy Related (Note 2)
Effective Output Capacitance, Time Related (Note 3)
Gate Resistance
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance, Energy Related (Note 2)
Effective Output Capacitance, Time Related (Note 3)
Gate Resistance
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance, Energy Related (Note 2)
Effective Output Capacitance, Time Related (Note 3)
Gate Resistance
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
V
DS
= 50 V, V
GS
= 5 V, I
D
= 0.05 A
V
DS
= 50 V, I
D
= 0.05 A
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 50 V, V
GS
= 5 V, I
D
= 2 A
V
DS
= 50 V, I
D
= 2 A
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 50 V, V
GS
= 5 V, I
D
= 2 A
V
DS
= 50 V, I
D
= 2 A
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 0 to 50 V, V
GS
= 0 V
MIN
TYP
21
0.2
9.2
13
18
0.7
190
77
41
49
900
0
21
0.2
14
19
25
0.7
190
77
41
49
1250
0
7
0.02
1.6
2.2
2.7
4.8
44
20
4
18
134
0
MAX
25
14
UNIT
pF
Ω
230
pC
1350
25
21
pF
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 0 to 50 V, V
GS
= 0 V
Q2
Ω
230
pC
1875
8.4
2.4
pF
V
DS
= 50 V, V
GS
= 0 V
V
DS
= 0 to 50 V, V
GS
= 0 V
Q3
Ω
55
pC
200
Note 2: C
OSS(ER)
is a fixed capacitance that gives the same stored energy as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Note 3: C
OSS(ER)
is a fixed capacitance that gives the same charging time as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018 |
| 2
eGaN® FET DATASHEET
Figure 1a (Q1 & Q2): Typical Output Characteristics at 25°C
0.5
V
GS
= 5 V
3
V
GS
= 4 V
V
GS
= 2 V
2
0.4
V
GS
= 5 V
V
GS
= 4 V
0.3
V
GS
= 3 V
V
GS
= 2 V
EPC2107
Figure 1b (Q3): Typical Output Characteristics at 25°C
I
D
–
Drain Current (A)
I
D
–
Drain Current (A)
3.0
V
GS
= 3 V
0.2
1
0.1
0
0
0.5
V
DS
–
Drain-to-Source Voltage (V)
1.0
1.5
2.0
2.5
00
0.5
V
DS
–
Drain-to-Source Voltage (V)
1.0
1.5
2.0
2.5
3.0
Figure 2a (Q1 & Q2): Transfer Characteristics
0.5
Figure 2b (Q3): Transfer Characteristics
3
25˚C
125˚C
0.4
25˚C
125˚C
V
DS
= 3 V
I
D
–
Drain Current (A)
I
D
–
Drain Current (A)
2.5
3.0
3.5
4.0
4.5
5.0
V
DS
= 3 V
2
0.3
0.2
1
0.1
0
0.5
1.0
1.5
V
GS
– Gate-to-Source Voltage (V)
2.0
0
0.5
1.0
1.5
V
GS
– Gate-to-Source Voltage (V)
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Figure 3a (Q1 & Q2): R
DS(on)
vs. V
GS
for Various Drain Currents
1000
8000
I
D
= 1.0 A
I
D
= 1.5 A
I
D
= 2.0 A
I
D
= 2.5 A
Figure 3b (Q3): R
DS(on)
vs. V
GS
for Various Drain Currents
R
DS(on)
– Drain-to-Source Resistance (m )
R
DS(on)
– Drain-to-Source Resistance (m )
750
6000
I
D
= 0.05 A
I
D
= 0.10 A
I
D
= 0.15 A
I
D
= 0.20 A
500
4000
250
2000
0
2.5
3.0
3.5
4.0
4.5
5.0
0
2.5
3.0
3.5
4.0
4.5
5.0
V
GS
– Gate-to-Source Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018 |
| 3
eGaN® FET DATASHEET
Figure 4a (Q1 & Q2): R
DS(on)
vs. V
GS
for Various Temperatures
1000
EPC2107
Figure 4b (Q3): R
DS(on)
vs. V
GS
for Various Temperatures
8000
25˚C
125˚C
I
D
= 2 A
R
DS(on)
– Drain-to-Source Resistance (m )
R
DS(on)
– Drain-to-Source Resistance (m )
750
6000
25˚C
125˚C
I
D
= 0.05 A
500
4000
250
2000
0
2.5
3.0
V
GS
– Gate-to-Source Voltage (V)
3.5
4.0
4.5
5.0
0
2.5
3.0
V
GS
– Gate-to-Source Voltage (V)
3.5
4.0
4.5
5.0
Figure 5a (Q1): Capacitance (Linear Scale)
40
100
Figure 5b (Q1): Capacitance (Log Scale)
30
Capacitance (pF)
20
Capacitance (pF)
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
10
1
10
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
0
0
25
50
75
100
0.1
V
DS
– Drain-to-Source Voltage (V)
0
25
V
DS
– Drain-to-Source Voltage (V)
50
75
100
Figure 5c (Q2): Capacitance (Linear Scale)
60
50
100
Figure 5d (Q2): Capacitance (Log Scale)
Capacitance (pF)
30
20
10
0
Capacitance (pF)
40
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
10
1
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
0
25
50
75
100
0.1
0
25
V
DS
– Drain-to-Source Voltage (V)
V
DS
– Drain-to-Source Voltage (V)
50
75
100
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| COPYRIGHT 2018 |
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eGaN® FET DATASHEET
Figure 5e (Q3): Capacitance (Linear Scale)
8
7
6
10
100
EPC2107
Figure 5f (Q3): Capacitance (Log Scale)
Capacitance (pF)
5
4
3
2
1
0
0
20
40
60
Capacitance (pF)
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
1
C
OSS
= C
GD
+ C
SD
C
ISS
= C
GD
+ C
GS
C
RSS
= C
GD
0.1
0.01
80
100
0.001
0
20
40
60
80
100
V
DS
– Drain-to-Source Voltage (V)
V
DS
– Drain-to-Source Voltage (V)
1.4
1.2
Figure 6a:
(Q1): Output Charge
C
OSS
Stored Energy
6a
Output Charge and
and C
OSS
Stored Energy
50
2.0
1.8
Figure 6a:
(Q2): Output Charge
C
OSS
Stored Energy
6b
Output Charge and
and C
OSS
Stored Energy
70
60
50
40
30
20
10
E
OSS
–
C
OSS
Stored Energy ( J)
1.0
0.8
0.6
0.4
0.2
0
10
30
1.4
1.2
1.0
0.8
0.6
0.4
0.2
20
0
25
50
75
100
0
0
0
20
40
60
80
100
0
V
DS
– Drain-to-Source Voltage (V)
V
DS
– Drain-to-Source Voltage (V)
0.25
Figure 6a:
(Q3): Output Charge and
Stored Energy
6c
Output Charge and C
OSS
C
OSS
Stored Energy
10
0.15
6
0.10
4
0.05
2
0.00
0
20
40
60
80
0
100
V
DS
– Drain-to-Source Voltage (V)
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| COPYRIGHT 2018 |
E
OSS
–
C
OSS
Stored Energy ( J)
0.20
8
Q
OSS
–
Output Charge (nC)
| 5
E
OSS
–
C
OSS
Stored Energy ( J)
40
1.6
Q
OSS
–
Output Charge (nC)
Q
OSS
–
Output Charge (nC)
