Development Board
EPC9085
Quick Start Guide
40 V Half-bridge with Gate Drive, Using EPC2049
QUICK START GUIDE
EPC9085
DESCRIPTION
The EPC9085 development board is a 40 V maximum device voltage, 20 A
maximum output current, half bridge with onboard gate drives, featuring
the EPC2049 enhancement mode (eGaN®) field effect transistor (FET). The
purpose of this development board is to simplify the evaluation process
of the EPC2049 eGaN FET by including all the critical components on a
single board that can be easily connected into any existing converter.
The EPC9085 development board is 2” x 2” and contains two EPC2049
eGaN FETs in a half bridge configuration using the Texas Instruments
LM5113 gate driver. The board also contains all critical components
and layout for optimal switching performance. There are also various
probe points to facilitate simple waveform measurement and efficiency
calculation. A block diagram of the circuit is given in figure 1.
For more information on the EPC2049 please refer to the datasheet
available from EPC at
www.epc-co.com.
The datasheet should be read in
conjunction with this quick start guide.
Table 1: Performance Summary (T
A
= 25°C) EPC9085
Symbol
V
DD
V
IN
I
OUT
V
PWM
Parameter
Gate Drive Input Supply Range
Bus Input Voltage Range
(1)
Switch Node Output Current
(2)
Conditions
Min
7.5
Max
12
28
20
Units
V
V
A
V
V
ns
ns
PWM Logic Input Voltage
Input ‘High’
Threshold
Input ‘Low’
Minimum ‘High’ State Input
V
PWM
rise and
Pulse Width
fall time < 10ns
Minimum ‘Low’ State Input Pulse V
PWM
rise and
Width
(3)
fall time < 10ns
3.5
0
50
200
6
1.5
(1) Maximum input voltage depends on inductive loading, maximum switch node ringing must be kept
under 40 V for EPC2049.
(2) Maximum current depends on die temperature – actual maximum current with be subject to
switching frequency, bus voltage and thermal cooling.
(3) Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
QUICK START PROCEDURE
Development board EPC9085 is easy to set up to evaluate the performance
of two EPC2049 eGaN FETs. Refer to figure 2 for proper connect and
measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +V
IN
(J5, J6) and
ground / return to –V
IN
(J7, J8).
2. With power off, connect the switch node (SW) of the half bridge OUT
(J3, J4) to your circuit as required (half bridge configuration). The
EPC9085 features an optional buck converter configuration, as shown
in figure 2, with unpopulated footprints for an output inductor and
output capacitors.
3. With power off, connect the gate drive input to +V
DD
(J1, Pin-1) and
ground return to –V
DD
(J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM
(J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7.5 V
and 12 V range.
6. Turn on the controller / PWM input source.
7. Turn on the bus voltage to the required value (do not exceed the
absolute maximum voltage) and probe switching node to see
switching operation.
8. Once operational, adjust the PWM control, bus voltage, and load within
the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE.
When measuring the high frequency content switch node, care must be taken
to provide an accurate high speed measurement. An optional two pin header (J10) is
included for switch node measurement. It is recommended to install measurement point
on backside of board to prevent contamination of the top side components.
For information about measurement techniques, please review the how to GaN series:
HTG09- Measurement
EPC9085 development board
http://epc-co.com/epc/DesignSupport/TrainingVideos/HowtoGaN/
2 |
| EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018
QUICK START GUIDE
EPC9085
V
DD
Gate drive
regulator
Gate drive supply
Half bridge with
bypass capacitors
V
IN
PWM input
Logic and
dead-time
adjust
LM5113
gate
driver
V
OUT
Figure 1: Block diagram of EPC9085 development board
Gate drive supply
V
DD
supply
(note polarity)
7.5 V – 12 V
+
+
V
IN
–
V
Switch node
I
IN
PWM input
–
External load Optional buck configuration
Figure 2: Proper connection and measurement setup
4 V/ div
5 ns/ div
V
IN
=24 V I
OUT
=15 A f
sw
= 500 kHz
Figure 3: Typical Waveform for V
IN
= 48 V to 1.8 V
OUT
, 10 A (500 kHz) Buck Converter
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018 |
+
–
Optional output
capacitor pads
+
External circuit
4 V/ div
V
IN
=24 V I
OUT
=15 A f
sw
= 500 kHz
–
+
(For efficiency
measurement)
–
+
–
Optional 2-pin
header for switch
node measurement Optional
inductor
pads
Half bridge configuration
A
V
IN
supply
5 ns/ div
| 3
QUICK START GUIDE
EPC9085
THERMAL CONSIDERATIONS
The EPC9085 development board showcases the EPC2049 eGaN
FET. The EPC9085 is intended for bench evaluation with low ambient
temperature and convection cooling. The addition of heat-sinking and
forced air cooling can significantly increase the current rating of these
devices, but care must be taken to not exceed the absolute maximum
die temperature of 150°C.
Table 2: Bill of Materials
Item
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Qty
3
1
2
1
4
2
2
1
1
1
1
1
3
1
1
1
3
6
2
Reference
C4, C10, C11
C9
C16, C17
C19
C21, C22, C23, C24
D1, D2
Q1, Q2
U1
U2
U3
U4
R1
R2, R15, R3
R4
R5
R19
J1, J2, J9
J3, J4, J5, J6, J7, J8
TP1, TP2
Part Description
Capacitor, 1 µF, 10%, 25 V, X5R
Capacitor, 0.1 µF, 10%, 25 V, X5R
Capacitor, 100 pF, 5%, 50 V, NP0
Capacitor, 1 µF, 10%, 25 V, X5R
Capacitor, CER 4.7 μF, 50 V, 10% X5R
Schottky Diode, 30 V
eGaN FET, 40 V, 5 mΩ
IC GATE NAND 1CH 2-INP 6MICROPAK
Gate Driver, LM5113, USMD, BGA
Microchip, MCP1703T-5002E/MC
IC GATE AND 1CH 2-INP 6-MICROPAK
Resistor, 10.0 K, 5%, 1/8 W
Resistor, 0 Ω, 1/8 W, 0603
RES SMD 100 Ω 1% 1/10 W 0603
RES SMD 160 Ω 1% 1/10W 0603
RES SMD 0.0 Ω JUMPER 1/16 W
2 pins of Tyco, 4-103185-0
FCI, 68602-224HLF
Keystone Elect, 5015
Manufacturer/Part Number
Murata, GRM188R61E105KA12D
TDK, C1005X5R1E104K050BC
Kemet, C0402C101K5GACTU
TDK, C1005X5R1E105K050BC
TDK, C2012X5R1H475K125AB
Diodes Inc., SDM03U40-7
EPC, EPC2049
Fairchild, NC7SZ00L6X
Texas Instruments, LM5113
Microchip, MCP1703T-5002E/MC
Fairchild, NC7SZ08L6X
Stackpole, RMCF0603FT10K0
ERJ-3GEY0R00V
RC0603FR-07100RL
RC0603FR-07160RL
Stackpole, RMCF0402ZT0R00TR-ND
2pins of Tyco, 4-103185-0
FCI, 68602-224HLF
Keystone Elect, 5015
NOTE.
The EPC9085 development board does not have any current or thermal
protection on board.
For more information regarding the thermal performance of EPC eGaN FETs, please
consult:
D. Reusch and J. Glaser,
DC-DC Converter Handbook,
a supplement to
GaN Transistors for
Efficient Power Conversion,
First Edition, Power Conversion Publications, 2015.
Optional Components
Item
1
2
3
4
5
Qty
Reference
Part Description
Optional Potentiometer
PCB Fiducial
VGS1 Probe
VSW probe
Low side drive PWM option
Manufacturer/Part Number
DNP P1,P2
DNP FD1, FD2, FD3
DNP J11
DNP J10
DNP R14
Note 1 (36 pin Header to be cut as follows) J70 cut 4 pins used, J90 cut 2 pins used, GP1 cut 1 pin used
4 |
| EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018
1
J11
1
2
CON2
VG1
VSW
TP1
Keystone 5015
J8
CON4
4
3
2
1
1
2
3
4
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2018 |
| 5
QUICK START GUIDE
J1
1
2
CON2
7 - 12 Vdc
C10
8
7
6
5
U3
IN
NC
NC
NC
GND
OUT
NC
NC
GND
1
2
3
4
C4
VLDO
R3
C11
VCC
MCP1703
PWM1
TP2
Keystone 5015
1
U1
1
2
CON2
J9
1
2
CON2
R1
10k
A
B
GND
NC7SZ00L6X
R2
Zero
U4
A
B
GND
NC7SZ08L6X
Y
VDD
P1
Optional
2
D1
SDM03U40
R4
2
D2
SDM03U40
R5
LM5113TM
C16
100pF
C19
9
J5
CON4
VIN
1
2
3
4
J6
CON4
J2
VCC
VDD
Y
U2
C9
R19
VG1
Q1
J3
CON4
C21 C22
C23 C24
4.7 F
HIN
VSW
VG2
Q2
4
3
2
1
LIN
1
2
3
4
J4
CON4
PWM2
P2
Optional
J10
1
2
CON2
R14
Optional
R15
Zero
C17
100pF
J7
CON4
4
3
2
1
EPC9085
Figure 4: EPC9085 - Schematic
