*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Uni−Directional
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted, V
F
= 1.1 V Max. @ I
F
= 10 mA)
Device
Marking
R
P
V
RWM
(V)
Max
3.3
5.0
I
R
(mA)
@ V
RWM
Max
1.0
0.5
V
BR
(V) @ I
T
(Note 2)
Min
5.0
11.0
I
T
mA
1.0
1.0
C (pF)
(Note 3)
Typ
12.8
6.0
C (pF)
(Note 3)
Max
13
6.2
V
C
Per IEC61000−4−2 (Note 4)
Figures 1 and 2
See Below
(Note 5)
Device
ESD9C3.3ST5G
ESD9C5.0ST5G
2.
3.
4.
5.
V
BR
is measured with a pulse test current I
T
at an ambient temperature of 25°C.
Capacitance at f = 1 MHz, V
R
= 0 V, T
A
= 25°C.
For test procedure see Figures 3 and 4 and Application Note AND8307/D.
ESD9C5.0ST5G shown below. Other voltages available upon request.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
www.onsemi.com
2
ESD9C3.3ST5G SERIES
IEC 61000−4−2 Spec.
Test
Voltage
(kV)
2
4
6
8
First Peak
Current
(A)
7.5
15
22.5
30
Current at
30 ns (A)
4
8
12
16
Current at
60 ns (A)
2
4
6
8
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
I @ 30 ns
IEC61000−4−2 Waveform
I
peak
100%
90%
Level
1
2
3
4
Figure 3. IEC61000−4−2 Spec
Device
ESD Gun
Under
Test
Oscilloscope
50
W
Cable
50
W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D
−
Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
www.onsemi.com
3
ESD9C3.3ST5G SERIES
PACKAGE DIMENSIONS
SOD−923
CASE 514AB
ISSUE C
−X−
−Y−
E
1
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
c
D
E
H
E
L
L2
MILLIMETERS
MIN
NOM MAX
0.34
0.37
0.40
0.15
0.20
0.25
0.07
0.12
0.17
0.75
0.80
0.85
0.55
0.60
0.65
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
INCHES
MIN
NOM MAX
0.013 0.015 0.016
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.007 REF
0.002 0.004 0.006
D
b
0.08 X Y
2X
TOP VIEW
A
c
H
E
SIDE VIEW
2X
SOLDERING FOOTPRINT*
L
0.36
2X
1.20
0.25
2X
2X
L2
BOTTOM VIEW
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
See Application Note AND8455/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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ON Semiconductor reserves the right to make changes without further notice to any products herein.
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