F72568
Advanced ACPI Controller IC Datasheet
Release Date: July, 2007
Version: 0.25P
Fintek
Feature Integration Technology Inc.
F72568
F72568 Datasheet Revision History
Version
0.20P
0.21P
0.22P
0.23P
0.24P
0.25P
Date
Nov.2005
2005/12/20
2006/9
2006/10
2007/3
2007/7
Page
Preliminary version
-
1
4
20
15
20
19
Added schematic
Revision History
Correct the description relative to Vref
Correct pin description, PIN 16
Application circuit updated
PLED, SLED register description
Application circuit updated
Update company address
Please note that all data and specifications are subject to change without notice. All the trade marks of products and
companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Customers using or selling these products for use
in such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from such
improper use or sales.
1
2007 V0.25P
Fintek
Feature Integration Technology Inc.
F72568
Table of Contents
1
2
3
4
5
6
GENERAL DESCRIPTION ........................................................................................................................................................ 1
FEATURE ..................................................................................................................................................................................... 1
PIN CONFIGURATION & BLOCK DIAGRAM...................................................................................................................... 2
SIMPLIFIED POWER SYSTEM DIAGRAM .......................................................................................................................... 3
PIN DESCRIPTION..................................................................................................................................................................... 3
FUNCTIONAL DESCRIPTION ................................................................................................................................................. 7
6.1
6.2
6.3
6.4
6.5
6.6
6.7
7
ACPI
STATE
.............................................................................................................................................................................. 7
C
HARGE PUMP
.......................................................................................................................................................................... 7
S
OFT
-
START
.............................................................................................................................................................................. 8
R
EFERENCE VOLTAGE
............................................................................................................................................................... 8
U
NDER
V
OLTAGE
P
ROTECTION
................................................................................................................................................. 8
O
VER
C
URRENT
P
ROTECTION
................................................................................................................................................... 8
A
CCESS
I
NTERFACE
.................................................................................................................................................................. 9
REGISTER DESCRIPTION. .................................................................................................................................................... 10
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
R
EGISTER
⎯
I
NDEX
01
H
......................................................................................................................................................... 10
PWM_VRAM_11, PWM_VRAM_10 F
INE TUNE
V
OLTAGE
R
EGISTER
⎯
I
NDEX
02
H
.......................................................... 10
R
EGISTER
⎯
I
NDEX
03
H
......................................................................................................................................................... 11
PWM_VTT_10, PWM_VTT_11 F
INE TUNE
V
OLTAGE
R
EGISTER
⎯
I
NDEX
04
H
................................................................... 11
R
EGISTER
⎯
I
NDEX
05
H
......................................................................................................................................................... 11
LR_PCIE_10, LR_PCIE_11 F
INE TUNE
V
OLTAGE
R
EGISTER
⎯
I
NDEX
06
H
.......................................................................... 12
R
EGISTER
⎯
I
NDEX
07
H
......................................................................................................................................................... 12
LR3_10, LR3_11 F
INE TUNE
V
OLTAGE
R
EGISTER
⎯
I
NDEX
08
H
........................................................................................... 13
LRPCIE_11, LR3_11 F
INE TUNE
V
OLTAGE
R
EGISTER
⎯
I
NDEX
09
H
.................................................................................... 13
7.10 PLED ACPI F
REQUENCY SETTING
R
EGISTER
⎯
I
NDEX
0A
H
................................................................................................. 14
7.11 PLED ACPI F
REQUENCY SETTING
R
EGISTER
⎯
I
NDEX
0B
H
................................................................................................. 15
7.12 SLED ACPI F
REQUENCY SETTING
R
EGISTER
⎯
I
NDEX
0C
H
................................................................................................. 15
7.13 U
NDER
V
OLTAGE
, O
VER
C
URRENT
E
NABLE
P
ROTECTION
R
EGISTER
⎯
I
NDEX
10
H
............................................................... 15
7.14 R
EGISTER
⎯
I
NDEX
11
H
......................................................................................................................................................... 16
8
9
ELECTRICAL CHARACTERISTIC....................................................................................................................................... 17
ORDERING INFORMATION .................................................................................................................................................. 18
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2007 V0.25P
Fintek
Feature Integration Technology Inc.
F72568
10 PACKAGE DIMENSIONS (48LQFP)...................................................................................................................................... 19
11 APPLICATION CIRCUIT ........................................................................................................................................................ 20
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2007 V0.25P
Fintek
Feature Integration Technology Inc.
F72568
1 General Description
The F72568 is a fully compliant ACPI controller IC specific for Intel CPU platform. Used with an ATX power
supply, this chip integrates synchronous PWM controller and regulator, several linear controllers, switching signals,
monitoring and control function into 48 pin LQFP package. Its operation mode (sleep or active) is selectable
through some control signals. The F72568 provides 3 switching signals which can generate 5V
DUAL
, 5V
USB
&
3.3V
DUAL
etc. The F72568 can also provide 6 linear controllers including VCCVID output with power good signal.
This chip integrates a charge pump engine to provide higher driving voltage for appropriate gate during standby. On
the other hand, this chip offers current limiting that protect each PWM outputs, and provides soft-start for linear
controller to avoid rush current. The power LED is programmable and compliant with PC2001. Moreover, this
high-performance chip integrates I
2
C interface to adjust VRAM, VTT, LR_PCIE, and LR_3 output. This chip is in
48pin LQFP package and powered by 5VSB.
2 Feature
ACPI compliant sleep state control
Provide 3 switching controlled signals for 5V
DUAL
, 5V
USB
and 3.3V
DUAL
Programmable 5V
DUAL
/5V
STR
/5V
CC
for USB device wake up
Provide 6 linear controller and typically use for –
-- 1 channel for Dual power
-- 1 channel for PCI_E power
-- 3 channels for 0.8~5V voltage requirement
-- 1.2V VCCVID with VID_GD signal output
Provide one PWM controller for DDR V
DDQ
Provide one PWM regulator for CPU/GMCH VTT termination
1 PWROK input signal(typically from ATXPWOKIN) and 1 PWROK output signal
Provide resume reset signal(RSMRST#)
Programmable power LED control
Provide V
REF
and VSB9V voltage for generating different voltage use
Power up soft-start and under-voltage monitoring for the linear regulators
Over current protection(OCP) on both PWM controller and regulator
Integrate I
2
C interface
Provide V
REF
/1.25V
48 pin LQFP package and 5VSB operation
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2007 V0.25P
嵌入式系统
