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FDR842P

P-Channel 1.8V Specified PowerTrench MOSFET

厂商名称:Fairchild

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FDR842P
December 2001
FDR842P
P-Channel 1.8V Specified PowerTrench
MOSFET
General Description
This P-Channel –1.8V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
It has been optimized for battery power management
applications.
Features
–11 A, –12 V R
DS(ON)
= 9 mΩ @ V
GS
= –4.5 V
R
DS(ON)
= 12 mΩ @ V
GS
= –2.5 V
R
DS(ON)
= 16 mΩ @ V
GS
= –1.8 V
Fast switching speed
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
Applications
Power management
Load switch
Battery protection
D
S
D
S
5
6
4
3
2
1
SuperSOT -8
TM
D
D
D
G
7
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
–12
±
8
(Note 1a)
Units
V
V
A
W
–11
–50
1.8
1.0
0.9
–55 to +150
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
70
20
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDR842P
Device
FDR842P
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
2001
Fairchild Semiconductor Corporation
FDR842P Rev D (W)
FDR842P
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
I
D
= –250
µA
V
GS
= 0 V,
I
D
= –250
µA,
Referenced to 25°C
V
DS
= –10 V,
V
GS
= 8 V,
V
GS
= –8 V,
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
I
D
= –250
µA
Min
–12
Typ
Max Units
V
Off Characteristics
–4.4
–1
100
–100
–0.4
–0.5
2.7
7
9
12
9
–50
56
5350
2135
1386
17
20
201
161
V
DS
= –6 V,
V
GS
= –4.5 V
I
D
= –11 A,
57
7
16
–1.5
(Note 2)
mV/°C
µA
nA
nA
V
mV/°C
9
12
16
12
mΩ
On Characteristics
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
–1.5
I
D
= –250
µA,
Referenced to 25°C
V
GS
= –4.5 V, I
D
= –11 A
V
GS
= –2.5 V, I
D
= –9.5 A
V
GS
= –1.8 V, I
D
= –7.5 A
V
GS
= – 4.5 V, I
D
= –11 A, T
J
=125°C
V
GS
= –4.5 V, V
DS
= –5 V
V
DS
= –5 V,
I
D
= –11 A
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
A
S
pF
pF
pF
30
35
322
258
80
ns
ns
ns
ns
nC
nC
nC
A
V
Dynamic Characteristics
V
DS
= –6 V,
f = 1.0 MHz
V
GS
= 0 V,
Switching Characteristics
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –6 V,
V
GS
= –4.5 V,
I
D
= –1 A,
R
GEN
= 6
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V
GS
= 0 V,
I
S
= –1.5 A
Voltage
–0.6
–1.2
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 70°/W when
mounted on a 1in
2
pad of 2 oz copper
b) 125°/W when
2
mounted on a .04 in
pad of 2 oz copper
c) 135°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDR842P Rev D (W)
FDR842P
Typical Characteristics
60
V
GS
= -4.5V
-2.5V
1.8
-1.8V
-I
D
, DRAIN CURRENT (A)
45
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-2.0V
V
GS
= -1.8V
1.6
-2.0V
1.4
-2.5V
1.2
-3.0V
-3.5V
1
-4.5V
30
-1.5V
15
0
0
0.5
1
1.5
2
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0.8
0
15
30
-I
D
, DIRAIN CURRENT (A)
45
60
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.024
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= -5.5A
0.019
1.3
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= -11A
V
GS
= -4.5V
1.2
1.1
0.014
T
A
= 25
o
C
0.009
1
T
A
= 125
o
C
0.9
0.8
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
0.004
1
2
3
4
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
70
-I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= -5V
-I
D
, DRAIN CURRENT (A)
56
T
A
= -55 C
o
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
25 C
125
o
C
o
V
GS
= 0V
10
1
0.1
0.01
0.001
0.0001
T
A
= 125
o
C
25
o
C
-55
o
C
42
28
14
0
0.6
1
1.4
1.8
2.2
-V
GS
, GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDR842P Rev D (W)
FDR842P
Typical Characteristics
5
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -11A
4
V
DS
= -4V
7500
-6V
-8V
6000
CAPACITANCE (pF)
C
ISS
f = 1 MHz
V
GS
= 0 V
3
4500
C
OSS
3000
C
RSS
1500
2
1
0
0
20
40
Q
g
, GATE CHARGE (nC)
60
80
0
0
3
6
9
12
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
R
DS(ON)
LIMIT
-I
D
, DRAIN CURRENT (A)
10
1s
1
V
GS
= -4.5V
SINGLE PULSE
R
θJA
= 135
o
C/W
T
A
= 25
o
C
0.01
0.01
DC
100
µ
s
1ms
10ms
100ms
50
Figure 8. Capacitance Characteristics.
40
SINGLE PULSE
R
θJA
= 135°C/W
T
A
= 25°C
30
20
0.1
10
0.1
1
10
100
0
0.001
0.01
0.1
1
t
1
, TIME (sec)
10
100
1000
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
R
θJA
(t) = r(t) * R
θJA
R
θJA
= 135 C/W
P(pk)
t
1
t
2
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
o
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDR842P Rev D (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E
2
CMOS
TM
EnSigna
TM
FACT™
FACT Quiet Series™
DISCLAIMER
FAST
®
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
®
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
®
VCX™
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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