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FIN1018MX_NL

Line Receiver, 1 Func, 1 Rcvr, PDSO8, 0.150 INCH, MS-012, SOIC-8

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Fairchild
零件包装代码
SOIC
包装说明
SOP, SOP8,.25
针数
8
Reach Compliance Code
compliant
ECCN代码
EAR99
输入特性
DIFFERENTIAL
接口集成电路类型
LINE RECEIVER
接口标准
EIA-644; TIA-644
JESD-30 代码
R-PDSO-G8
JESD-609代码
e3
长度
4.9 mm
湿度敏感等级
1
功能数量
1
端子数量
8
最高工作温度
85 °C
最低工作温度
-40 °C
最大输出低电流
0.008 A
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP8,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
电源
3.3 V
认证状态
Not Qualified
最大接收延迟
2.5 ns
接收器位数
1
座面最大高度
1.75 mm
最大压摆率
7 mA
最大供电电压
3.6 V
最小供电电压
3 V
标称供电电压
3.3 V
表面贴装
YES
温度等级
INDUSTRIAL
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
3.9 mm
文档预览
FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver
March 2001
Revised April 2002
FIN1018
3.3V LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock or data.
The FIN1018 can be paired with its companion driver, the
FIN1017, or with any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
3.3V power supply operation
s
0.4ns maximum pulse skew
s
2.5ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Fail safe protection for open-circuit, shorted and termi-
nated conditions
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Flow-through pinout simplifies PCB layout
s
8-Lead SOIC and US-8 packages save space
Ordering Code:
Order Number
FIN1018M
FIN1018MX
FIN1018K8X
Package Number
M08A
M08A
MAB08A
Package Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
Pin Descriptions
Pin Name
R
OUT
R
IN+
R
IN−
V
CC
GND
NC
Description
LVTTL Data Output
Non-inverting Driver Input
Inverting Driver Input
Power Supply
Ground
No Connect
Connection Diagrams
8-Lead SOIC
Function Table
Input
R
IN+
L
H
R
IN−
H
L
Outputs
R
OUT
L
H
H
Pin Assignment for US-8 Package
Fail Safe Condition
H
=
HIGH Logic Level
L
=
LOW Logic Level
Fail Safe
=
Open, Shorted, Terminated
TOP VIEW
© 2002 Fairchild Semiconductor Corporation
DS500502
www.fairchildsemi.com
FIN1018
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Voltage (R
IN+
, R
IN−
)
DC Output Voltage (D
OUT
)
DC Output Current (I
O
)
Storage Temperature Range (T
STG
)
Max Junction Temperature (T
J
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
ESD (Human Body Model)
ESD (Bus Pins R
IN−
/R
IN+
to GND)
ESD (Machine Model)
260
°
C
0.5V to
+
4.6V
0.5V to
+
4.7V
0.5V to
+
6V
16 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
IN
)
Magnitude of Differential Voltage
(|V
ID
|)
Common-mode Input Voltage (V
IC
)
Operating Temperature (T
A
)
100mV to V
CC
0.05V to 2.35V
3.0V to 3.6V
0 to V
CC
65
°
C to
+
150
°
C
150
°
C
40
°
C to
+
85
°
C
6500V
9500V
300V
Note 1:
The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
V
TH
V
TL
I
IN
I
I(OFF)
V
OH
V
OL
V
IK
I
CC
C
IN
C
OUT
Parameter
Differential Input Threshold HIGH
Differential Input Threshold LOW
Input Current
Power-OFF Input Current
Output HIGH Voltage
Output LOW Voltage
Input Clamp Voltage
Power Supply Current
Input Capacitance
Output Capacitance
Test Conditions
See Figure 1 and Table 1
See Figure 1 and Table 1
V
IN
=
0V or V
CC
V
CC
=
0V, V
IN
=
0V or 3.6V
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
=
100
µA
I
OL
=
8 mA
I
IK
= −18
mA
Inputs Open, (R
IN
+
=
1V and R
IN
=
1.4V),
or (R
IN
+
=
1.4V and R
IN
=
1V)
4
6
−1.5
7
V
CC
−0.2
2.4
0.2
0.5
−100
±20
±20
Min
Typ
(Note 2)
100
Max
Units
mV
mV
µA
µA
V
V
V
V
V
mA
pF
pF
Note 2:
All typical values are at T
A
=
25°C and with V
CC
=
3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
t
PLH
t
PHL
t
TLH
t
THL
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay LOW-to-HIGH
Propagation Delay HIGH-to-LOW
Output Rise Time (20% to 80%)
Output Fall Time (80% to 20%)
Pulse Skew |t
PLH
- t
PHL
|
Part-to-Part Skew (Note 4)
|V
ID
|
=
400 mV, C
L
=
10 pF
See Figure 1 and Figure 2
Test Conditions
Min
0.9
0.9
0.5
0.5
0.4
1.0
Typ
(Note 3)
2.5
2.5
Max
Units
ns
ns
ns
ns
ns
ns
Note 3:
All typical values are at T
A
=
25°C and with V
CC
=
3.3V.
Note 4:
t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
www.fairchildsemi.com
2
FIN1018
Note A:
All input pulses have frequency
=
10MHz, t
R
or t
F
=
1ns
Note B:
C
L
includes all probe and fixture capacitances
FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
TABLE 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applied Voltages (V)
V
IA
1.25
1.15
2.4
2.3
0.1
0
1.5
0.9
2.4
1.8
0.6
0
V
IB
1.15
1.25
2.3
2.4
0
0.1
0.9
1.5
1.8
2.4
0
0.6
Resulting Differential
Input Voltage (mV)
V
ID
100
−100
100
−100
100
−100
600
−600
600
−600
600
−600
Resulting Common Mode
Input Voltage (V)
V
IC
1.2
1.2
2.35
2.35
0.05
0.05
1.2
1.2
2.1
2.1
0.3
0.3
FIGURE 2. LVDS Input to LVTTL Output AC Waveforms
3
www.fairchildsemi.com
FIN1018
DC / AC Typical Performance Curves
FIGURE 3. Output High Voltage vs.
Power Supply Voltage
FIGURE 4. Output Low Voltage vs.
Power Supply Voltage
FIGURE 5. Output Short Circuit Current vs.
Power Supply Voltage
FIGURE 6. Power Supply Current vs.
Frequency
FIGURE 7. Power Supply Current vs.
Ambient Temperature
FIGURE 8. Differential Propagation Delay
Power Supply Voltage
www.fairchildsemi.com
4
FIN1018
DC / AC Typical Performance Curves
(Continued)
FIGURE 9. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 10. Differential Skew vs.
Power Supply Voltage
FIGURE 11. Differential Skew vs.
Ambient Temperature
FIGURE 12. Differential Propagation Delay vs.
Differential Input Voltage
FIGURE 13. Differential Propagation Delay vs.
Common-Mode Voltage
5
FIGURE 14. Transition Time vs.
Power Supply Voltage
www.fairchildsemi.com
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