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FM24C256EYYX

256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

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FM24C256 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
June 2000
FM24C256
256 KBit 2-Wire Bus Interface
Serial EEPROM with Write Protect
General Description
The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS
nonvolatile electrically erasable memory. These devices offer the
designer different low voltage and low power options. They
conform to all requirements in the Extended IIC 2-wire protocol.
Furthermore, they are designed to minimize device pin count and
simplify PC board layout requirements.
The entire memory array can be write disabled (Write Protection)
by connecting the WP pin to V
CC
.
Functional address lines allow up to eight devices on the same
bus, for up to a total of 2 Mbit address space.
The IIC communication protocol uses CLOCK (SCL) and DATA
I/O (SDA) lines to synchronously clock data between the master
(for example a microprocessor) and the slave EEPROM device(s).
Fairchild EEPROMs are designed and tested for applications
requiring high endurance, high reliability, and low power con-
sumption.
Features
I
Extended Operating Voltages
— C256: 4.5V - 5.5V
— C256L: 2.7V - 5.5V
— C256LZ: 2.7V - 5.5V
I
Low Power CMOS
— 1mA active current typical
— C256/C256L: 10µA standby current typical
— C256LZ: less than 1µA standby current
I
2-wire IIC serial interface
I
64 byte page write mode
I
Max write cycle time of 6ms byte/page
I
40 years data retention
I
Endurance: 100,000 data changes
I
Hardware write protect for entire array
I
Schmitt trigger inputs for noise suppression
I
Electrostatic discharge protection > 4000V
I
8-pin DIP and 8-pin SO (150 mil) packages. Contact factory
for CSP package availability
Block Diagram
VCC
WP
SDA
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER &
COMPARATOR
LOAD
A2
A1
A0
WORD
ADDRESS
COUNTER
INC
E2PROM
ARRAY
WRITE
LOCKOUT
START CYCLE
H.V. GENERATION
TIMING &CONTROL
SCL
XDEC
R/W
YDEC
CK
DIN
DATA REGISTER
DOUT
DS800023-1
© 2000 Fairchild Semiconductor International
FM24C256 rev. B.3
1
www.fairchildsemi.com
FM24C256 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
Connection Diagram
Dual-In-Line Package (N)
and 8-Pin SO Package (M8)
A0
A1
A2
VSS
1
2
FM24C256
3
4
6
5
SCL
SDA
DS800023-2
8
7
VCC
WP
Top View
See Package Number N08E and M08A
Pin Names
A0, A1, A2
V
SS
SDA
SCL
WP
V
CC
Device Address Input
Ground
Data I/O
Clock Input
Write Protect
Power Supply
2
FM24C256 rev. B.3
www.fairchildsemi.com
FM24C256 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
Ordering Information
Commercial Temperature Range: 0
°
to +70
°
C
Part Number
FM24C256YYX
FM24C256LYYX
FM24C256LZYYX
FM24C256FYYX
FM24C256FLYYX
FM24C256FLZYYX
400KHz
4.5V - 5.5V
2.7V - 5.5V
1µA max
100KHz
Clock Frequency
V
CC
4.5V - 5.5V
2.7V - 5.5V
Standby Current
10µA typical
1µA max
10µA typical
Industrial Temperature Range: -40
°
to +85
°
C
Part Number
FM24C256EYYX
FM24C256LEYYX
FM24C256LZEYYX
FM24C256FEYYX
FM24C256FLEYYX
FM24C256FLZEYYX
400KHz
4.5V - 5.5V
2.7V - 5.5V
1µA max
100KHz
Clock Frequency
V
CC
4.5V - 5.5V
2.7V - 5.5V
Standby Current
10µA typical
1µA max
10µA typical
FM
24
C
XX
F
LZ
E
YY
X
Letter
Blank
X
Package
N
M8
Blank
E
Blank
L
LZ
Blank
F
256
C
Interface
24
FM
Description
Tube
Tape and Reel
8-pin DIP
8-pin SO8
0 to 70°C
-40 to +85°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V and
<1µA Standby Current
100KHz
400KHz
256K with write protect
CMOS
IIC - 2 Wire
Fairchild Non-Volatile
Memory
Temp. Range
Voltage Operating Range
SCL Clock Frequency
Density
3
FM24C256 rev. B.3
www.fairchildsemi.com
FM24C256 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
Absolute Maximum Ratings
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 seconds)
ESD Rating
–65°C to +150°C
6.5V to –0.3V
+300°C
4000V min.
Operating Conditions
Ambient Operating Temperature
FM24C256/L/LZ
FM24C256F/FL/FLZ
FM24C256E/LE/LZE
FM24C256FE/FLE/FLZE
Positive Power Supply
FM24C256/E
FM24C256F/FE
FM24C256L/LZ
FM24C256FL/FLZ
FM24C256LE/LZE
FM24C256FLE/FLZE
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
4.5V to 5.5V
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V
2.7V to 5.5V
2.7V to 4.5V
Standard V
CC
(4.5V to 5.5V) DC Electrical Characteristics
Symbol
I
CCA
I
SB
I
LI
I
LO
V
IL
V
IH
V
OL
Parameter
Active Power Supply Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Test Conditions
Min
f
SCL
= 100 kHz
f
SCL
= 400 kHz
V
IN
= GND or V
CC
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
I
OL
= 2.1 mA
Limits
Typ
0.5
10
0.1
0.1
Units
Max
1.0
50
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
µA
µA
V
V
V
Low V
CC
(2.7V to 5.5V) DC Electrical Characteristics
Symbol
I
CCA
I
SB
(Note 1)
Parameter
Active Power Supply Current
Standby Current for L
Standby Current for LZ
Test Conditions
Min
f
SCL
= 100 kHz
f
SCL
= 400 kHz
V
IN
= GND or V
CC
= 4.5V - 5.5V
V
IN
= GND or V
CC
= 2.7V - 4.5V
V
IN
= GND or V
CC
= 4.5V - 5.5V
V
IN
= GND or V
CC
= 2.7V - 4.5V
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
I
OL
= 2.1 mA
Limits
Typ
0.5
10
1
10
0.1
0.1
0.1
Units
Max
1.0
50
10
50
1
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
I
LI
I
LO
V
IL
V
IH
V
OL
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
µA
µA
V
V
V
Capacitance
T
A
= +25°C, f = 100/400 KHz, V
CC
= 5V
Symbol
C
I/O
C
IN
Test
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
Conditions
V
I/O
= 0V
V
IN
= 0V
Max
8
6
Units
pF
pF
Note 1:
Typical values are for T
A
= 25°C and nominal supply voltage (5V).
4
FM24C256 rev. B.3
www.fairchildsemi.com
FM24C256 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
AC Conditions of Test
Input Pulse Levels
Input Rise and Fall Times
Input & Output Timing Levels
Output Load
V
CC
x 0.1 to V
CC
x 0.9
10 ns
V
CC
x 0.5
1 TTL Gate and C
L
= 100 pF
Read and Write Cycle Limits (Standard and Low V
CC
Range - 2.7V-5.5V)
Symbol
f
SCL
T
I
Parameter
SCL Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs (Minimum V
IN
Pulse width)
SCL Low to SDA Data Out Valid
Time the Bus Must Be Free before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data in Hold Time
Data in Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Write Cycle Time
100 kHz
Min
Max
100
100
0.3
4.7
4.0
4.7
4.0
4.7
0
250
1
300
4.7
100
6
3.5
400 kHz
Min
Max
400
50
0.3
1.3
0.6
1.5
0.6
0.6
0
100
0.3
300
0.6
100
6
1.2
Units
kHz
ns
µs
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
ms
t
AA
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
DH
t
WR
(Note 2)
Note 2:
The write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the
FM24C256 bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address
5
FM24C256 rev. B.3
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