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FM93CS46LZEN

EEPROM, 64X16, Serial, CMOS, PDIP8, PLASTIC, DIP-8

器件类别:存储    存储   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Fairchild
零件包装代码
DIP
包装说明
DIP, DIP8,.3
针数
8
Reach Compliance Code
unknown
ECCN代码
EAR99
最大时钟频率 (fCLK)
0.25 MHz
数据保留时间-最小值
40
耐久性
1000000 Write/Erase Cycles
JESD-30 代码
R-PDIP-T8
JESD-609代码
e0
长度
9.817 mm
内存密度
1024 bit
内存集成电路类型
EEPROM
内存宽度
16
功能数量
1
端子数量
8
字数
64 words
字数代码
64
工作模式
SYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
64X16
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP8,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
并行/串行
SERIAL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3/5 V
认证状态
Not Qualified
座面最大高度
5.08 mm
串行总线类型
MICROWIRE
最大待机电流
0.000001 A
最大压摆率
0.001 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3.3 V
表面贴装
NO
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.62 mm
最长写入周期时间 (tWC)
15 ms
写保护
HARDWARE/SOFTWARE
文档预览
FM93C46 1024-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
July 2000
FM93C46
1024-Bit Serial CMOS EEPROM
(MICROWIRE™ Synchronous Bus)
General Description
FM93C46 is a 1024-bit CMOS non-volatile EEPROM organized
as 64 x 16-bit array. This device features MICROWIRE interface
which is a 4-wire serial bus with chipselect (CS), clock (SK), data
input (DI) and data output (DO) signals. This interface is compat-
ible to many of standard Microcontrollers and Microprocessors.
There are 7 instructions implemented on the FM93C46 for various
Read, Write, Erase, and Write Enable/Disable operations. This
device is fabricated using Fairchild Semiconductor floating-gate
CMOS process for high reliability, high endurance and low power
consumption.
“LZ” and “L” versions of FM93C46 offer very low standby current
making them suitable for low power applications. This device is
offered in both SO and TSSOP packages for small space consid-
erations.
Features
I
Wide V
CC
2.7V - 5.5V
I
Typical active current of 200µA
10µA standby current typical
1µA standby current typical (L)
0.1µA standby current typical (LZ)
I
No Erase instruction required before Write instruction
I
Self timed write cycle
I
Device status during programming cycles
I
40 year data retention
I
Endurance: 1,000,000 data changes
I
Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
Functional Diagram
CS
SK
DI
INSTRUCTION
REGISTER
V
CC
INSTRUCTION
DECODER
CONTROL LOGIC
AND CLOCK
GENERATORS
ADDRESS
REGISTER
HIGH VOLTAGE
GENERATOR
AND
PROGRAM
TIMER
DECODER
EEPROM ARRAY
16
READ/WRITE AMPS
16
V
SS
DATA IN/OUT REGISTER
16 BITS
DO
DATA OUT BUFFER
© 2000 Fairchild Semiconductor International
FM93C46 Rev. D.1
1
www.fairchildsemi.com
FM93C46 1024-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Connection Diagram
Dual-In-Line Package (N)
8–Pin SO (M8) and 8–Pin TSSOP (MT8)
CS
SK
DI
DO
1
2
3
4
8
V
CC
NC
NC
GND
NC
VCC
CS
SK
1
2
3
4
8
NC
GND
DO
DI
Normal
7
Pinout
6
5
Rotated
Pinout
7
6
5
Top View
Package Number
N08E, M08A and MTC08
Pin Names
CS
SK
DI
DO
GND
NC
V
CC
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
No Connect
Power Supply
NOTE:
Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care
should be taken that the voltage applied on these pins does not exceed the V
CC
applied to the device. This will ensure proper operation.
Ordering Information
FM
93
C
XX
T
LZ
E
XXX
Package
N
M8
MT8
None
V
E
Blank
L
LZ
Blank
T
Density
46
C
CS
Interface
93
Letter Description
8-pin DIP
8-pin SO
8-pin TSSOP
0 to 70°C
-40 to +125°C
-40 to +85°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V and
<1µA Standby Current
Normal Pinout
Rotated Pinout
1024 bits
CMOS
Data protect and sequential
read
MICROWIRE
Temp. Range
Voltage Operating Range
Fairchild Memory Prefix
2
FM93C46 Rev. D.1
www.fairchildsemi.com
FM93C46 1024-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
ESD rating
-65°C to +150°C
+6.5V to -0.3V
Operating Conditions
Ambient Operating Temperature
FM93C46
FM93C46E
FM93C46V
Power Supply (V
CC
)
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
4.5V to 5.5V
+300°C
2000V
DC and AC Electrical Characteristics
V
CC
= 4.5V to 5.5V unless otherwise specified
Symbol
I
CCA
I
CCS
I
IL
I
OL
V
IL
V
IH
V
OL1
V
OH1
V
OL2
V
OH2
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DH
t
DIS
t
CSH
t
DIH
t
PD
t
SV
t
DF
t
WP
Parameter
Operating Current
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
SK Clock Frequency
SK High Time
SK Low Time
Minimum CS Low Time
CS Setup Time
DO Hold Time
DI Setup Time
CS Hold Time
DI Hold Time
Output Delay
CS to Status Valid
CS to DO in Hi-Z
Write Cycle Time
Conditions
CS = V
IH
, SK=1.0 MHz
CS = V
IL
V
IN
= 0V to V
CC
(Note 2)
Min
Max
1
50
±-1
Units
mA
µA
µA
V
V
V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
-0.1
2
I
OL
= 2.1 mA
I
OH
= -400
µA
I
OL
= 10
µA
I
OH
= -10
µA
(Note 3)
0°C to +70°C
-40°C to +125°C
250
300
250
(Note 4)
250
50
70
100
0
20
2.4
0.8
V
CC
+1
0.4
0.2
V
CC
- 0.2
1
500
500
CS = V
IL
100
10
ns
ns
ns
ms
3
FM93C46 Rev. D.1
www.fairchildsemi.com
FM93C46 1024-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
ESD rating
-65°C to +150°C
+6.5V to -0.3V
Operating Conditions
Ambient Operating Temperature
FM93C46L/LZ
FM93C46LE/LZE
FM93C46LV/LZV
Power Supply (V
CC
)
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
2.7V to 5.5V
+300°C
2000V
DC and AC Electrical Characteristics
V
CC
= 2.7V to 4.5V unless otherwise specified. Refer to
page 3 for V
CC
= 4.5V to 5.5V.
Symbol
I
CCA
I
CCS
Parameter
Operating Current
Standby Current
L
LZ (2.7V to 4.5V)
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
SK Clock Frequency
SK High Time
SK Low Time
Minimum CS Low Time
CS Setup Time
DO Hold Time
DI Setup Time
CS Hold Time
DI Hold Time
Output Delay
CS to Status Valid
CS to DO in Hi-Z
Write Cycle Time
Conditions
CS = V
IH
, SK=250 KHz
CS = V
IL
Min
Max
1
10
1
Units
mA
µA
µA
µA
V
V
KHz
µs
µs
µs
µs
ns
µs
ns
µs
I
IL
I
OL
V
IL
V
IH
V
OL
V
OH
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DH
t
DIS
t
CSH
t
DIH
t
PD
t
SV
t
DF
t
WP
V
IN
= 0V to V
CC
(Note 2)
-0.1
0.8V
CC
I
OL
= 10µA
I
OH
= -10µA
(Note 3)
0.9V
CC
0
1
1
(Note 4)
1
0.2
70
0.4
0
0.4
±1
0.15V
CC
V
CC
+1
0.1V
CC
250
2
1
CS = V
IL
0.4
15
µs
µs
µs
ms
Capacitance
T
A
= 25°C, f = 1 MHz or
250 KHz (Note 5)
Symbol
C
OUT
C
IN
Note 1:
Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2:
Typical leakage values are in the 20nA range.
Test
Output Capacitance
Input Capacitance
Typ
Max
5
5
Units
pF
pF
Note 3:
The shortest allowable SK clock period = 1/f
SK
(as shown under the f
SK
parameter). Maximum
SK clock speed (minimum SK period) is determined by the interaction of several AC parameters stated
in the datasheet. Within this SK period, both t
SKH
and t
SKL
limits must be observed. Therefore, it is not
allowable to set 1/f
SK
= t
SKHminimum
+ t
SKLminimum
for shorter SK cycle time operation.
Note 4:
CS (Chip Select) must be brought low (to V
IL
) for an interval of t
CS
in order to reset all internal
device registers (device reset) prior to beginning another opcode cycle. (This is shown in the opcode
diagram on the following page.)
Note 5:
This parameter is periodically sampled and not 100% tested.
AC Test Conditions
V
CC
Range
(Extended Voltage Levels)
V
IL
/V
IH
Input Levels
0.3V/1.8V
0.4V/2.4V
V
IL
/V
IH
Timing Level
1.0V
1.0V/2.0V
V
OL
/V
OH
Timing Level
0.8V/1.5V
0.4V/2.4V
I
OL
/I
OH
±10µA
2.1mA/-0.4mA
2.7V
V
CC
5.5V
(TTL Levels)
4.5V
V
CC
5.5V
Output Load: 1 TTL Gate (C
L
= 100 pF)
4
FM93C46 Rev. D.1
www.fairchildsemi.com
FM93C46 1024-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Pin Description
Chip Select (CS)
This is an active high input pin to FM93C46 EEPROM (the device)
and is generated by a master that is controlling the device. A high
level on this pin selects the device and a low level deselects the
device. All serial communications with the device is enabled only
when this pin is held high. However this pin cannot be permanently
tied high, as a rising edge on this signal is required to reset the
internal state-machine to accept a new cycle and a falling edge to
initiate an internal programming after a write cycle. All activity on the
SK, DI and DO pins are ignored while CS is held low.
Microwire Interface
A typical communication on the Microwire bus is made through the
CS, SK, DI and DO signals. To facilitate various operations on the
Memory array, a set of 7 instructions are implemented on FM93C46.
The format of each instruction is listed under Table 1.
Instruction
Each of the 7 instructions is explained under individual instruction
descriptions.
Start bit
This is a 1-bit field and is the first bit that is clocked into the device
when a Microwire cycle starts. This bit has to be “1” for a valid cycle
to begin. Any number of preceding “0” can be clocked into the
device before clocking a “1”.
Serial Clock (SK)
This is an input pin to the device and is generated by the master that
is controlling the device. This is a clock signal that synchronizes the
communication between a master and the device. All input informa-
tion (DI) to the device is latched on the rising edge of this clock input,
while output data (DO) from the device is driven from the rising edge
of this clock input. This pin is gated by CS signal.
Opcode
This is a 2-bit field and should immediately follow the start bit.
These two bits (along with 2 MSB of address field) select a
particular instruction to be executed.
Serial Input (DI)
This is an input pin to the device and is generated by the master
that is controlling the device. The master transfers Input informa-
tion (Start bit, Opcode bits, Array addresses and Data) serially via
this pin into the device. This Input information is latched on the
rising edge of the SCK. This pin is gated by CS signal.
Address Field
This is a 6-bit field and should immediately follow the Opcode bits.
In FM93C46, all 6 bits are used for address decoding during
READ, WRITE and ERASE instructions. During all other instruc-
tions, the MSB 2 bits are used to decode instruction (along with
Opcode bits).
Serial Output (DO)
This is an output pin from the device and is used to transfer Output
data via this pin to the controlling master. Output data is serially
shifted out on this pin from the rising edge of the SCK. This pin is
active only when the device is selected.
Data Field
This is a 16-bit field and should immediately follow the Address
bits. Only the WRITE and WRALL instructions require this field.
D15 (MSB) is clocked first and D0 (LSB) is clocked last (both
during writes as well as reads).
Table 1. Instruction set
Instruction
READ
WEN
WRITE
WRALL
WDS
ERASE
ERAL
Start Bit
1
1
1
1
1
1
1
Opcode Field
10
00
01
00
00
11
00
A5
1
A5
0
0
A5
1
Address Field
A4
1
A4
1
0
A4
0
A3
X
A3
X
X
A3
X
A2
X
A2
X
X
A2
X
A1
X
A1
X
X
A1
X
A0
X
A0
X
X
A0
X
Data Field
D15-D0
D15-D0
5
FM93C46 Rev. D.1
www.fairchildsemi.com
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