Fremont Micro Devices
FT24C04A-KXX
Two-Wire Serial EEPROM
4K (16-bit wide)
FEATURES
DESCRIPTION
© 2017 Fremont Micro Devices Inc.
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The FT24C04A-KXX is 4096 bits of serial Electrical Erasable and Programmable Read Only Memory,
commonly known as EEPROM. They are organized as 512 words of 8 bits (1 byte) each. The devices are
fabricated with proprietary advanced CMOS process for low power and low voltage applications. These
devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-lead DFN and
5-lead SOT-23/TSOT-23 packages. A standard 2-wire serial interface is used to address all read and write
functions. Our extended V
CC
range (1.8V to 5.5V) devices enables wide spectrum of applications.
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Low voltage and low power operations:
FT24C04A-KXX: VCC = 1.8V to 5.5V, Industrial temperature range (-40℃ to 85℃).
Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).
16 bytes page write mode.
Partial page write operation allowed.
Internally organized: 512
×
8 (4K).
Standard 2-wire bi-directional serial interface.
Write protect pin for hardware data protection.
Schmitt trigger, filtered inputs for noise protection.
Self-timed programming cycle (5ms maximum).
1 MHz (2.5V-5V), 400 kHz (1.8V) Compatibility.
Automatic erase before write operation.
High reliability: typically 1,000,000 cycles endurance.
100 years data retention.
Standard 8-pin DIP/SOP/MSOP/TSSOP/DFN and 5-pin SOT-23/TSOT-23 Pb-free packages.
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Fremont Micro Devices
FT24C04A-KXX
PIN CONFIGURATION
Pin Name
A2, A1
SDA
SCL
VCC
WP
GND
NC
Pin Function
Device Address Inputs
Serial Data Input / Open Drain Output
Serial Clock Input
Power Supply
Write Protect
Ground
No-Connect
Table 1
All these packaging types come in conventional or Pb-free certified.
FT24C04A-KXX
NC
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
© 2017 Fremont Micro Devices Inc.
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Figure 1: Package types
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FT24C04A-KXX-page2
8L
8L
8L
8L
8L
DIP
SOP
TSSOP
DFN
MSOP
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SCL
GND
SDA
1
2
3
5
4
FT24C04A-KXX
5L SOT-23
5L TSOT-23
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NC
VCC
Fremont Micro Devices
FT24C04A-KXX
ABSOLUTE MAXIMUM RATINGS
Industrial operating temperature:
Storage temperature:
Input voltage on any pin relative to ground:
Maximum voltage:
ESD protection on all pins:
-40℃ to 85℃
-50℃ to 125℃
-0.3V to V
CC
+ 0.3V
8V
>2000V
* Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the
device. Functional operation of the device at conditions beyond those listed in the specification is not
guaranteed. Prolonged exposure to extreme conditions may affect device reliability or functionality.
SDA
WP
Serial Bus
Control Logic
SCL
Slave Address
Monitor
Data Address
Counter
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Dataout/ACK
A1
A2
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Figure 2: Block Diagram
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Row
Decoder
Start/Stop
Control Logic
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Pgm High Voltage
Generation
Page Data Latch
EEPROM
ARRAY
Column Decoder
Data Reg
Sense Amp
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Fremont Micro Devices
FT24C04A-KXX
PIN DESCRIPTIONS
(A) SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of
this clock is to clock data out of the EEPROM device.
(B) SERIAL DATA LINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can
be wired-OR with other open-drain output devices.
(C) DEVICE / CHIP SELECT ADDRESSES (A2, A1)
These are the chip select input signals for the serial EEPROM devices. Typically, these signals are
hardwired to either V
IH
or V
IL
. If left unconnected, they are internally recognized as V
IL
.
The FT24C04A-KXX devices have a WP pin to protect the whole EEPROM array from programming.
Programming operations are allowed if WP pin is left un-connected or input to V
IL
. Conversely all
programming functions are disabled if WP pin is connected to V
IH
or V
CC
. Read operations is not affected
by the WP pin’s input level.
MEMORY ORGANIZATION
DEVICE OPERATION
(A) SERIAL CLOCK AND DATA TRANSITIONS
© 2017 Fremont Micro Devices Inc.
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The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when
Serial clock SCL is at V
IL
. Any SDA signal transition may interpret as either a START or STOP
condition as described below.
(B) START CONDITION
With SCL
≥
V
IH
, a SDA transition from high to low is interpreted as a START condition. All valid
commands must begin with a START condition.
(C) STOP CONDITION
With SCL
≥
V
IH
, a SDA transition from low to high is interpreted as a STOP condition. All valid read
or write commands end with a STOP condition. The device goes into the STANDBY mode if it is after
a read command. A STOP condition after page or byte write command will trigger the chip into the
STANDBY mode after the self-timed internal programming finish.
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The FT24C04A-KXX devices have 32 pages. Since each page has 16 bytes, random word addressing to
FT24C04A-KXX will require 9 bits data word addresses.
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(D) WRITE PROTECT (WP)
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(D) ACKNOWLEDGE
FT24C04A-KXX
The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The
EEPROM acknowledges the data or address by outputting a "0" after receiving each word. The
ACKNOWLEDGE signal occurs on the 9th serial clock after each word.
(E) STANDBY MODE
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP bit
in read mode, or after completing a self-time internal programming operation.
SCL
SDA
START
Condition
Data
Valid
Figure 3: Timing diagram for START and STOP conditions
START Condition
SCL
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Data in
D
ACK
Figure 4: Timing diagram for output ACKNOWLEDGE
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Data out
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Data
Transition
STOP
Condition
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