Fremont Micro Devices
Preliminary FT25L04/02
FT25L04/02
DATASHEET
© 2014 Fremont Micro Devices Inc.
Confidential Rev1.0
DS25L04/02-page1
Fremont Micro Devices
Preliminary FT25L04/02
CONTENTS
1.
2.
3.
4.
5.
6.
7.
FEATURES ............................................................................................................................................ 3
GENERAL DESCRIPTION .................................................................................................................... 4
MEMORY ORGANIZATION................................................................................................................... 6
DEVICE OPERATION............................................................................................................................ 8
DATA PROTECTION ............................................................................................................................. 8
STATUS REGISTER ............................................................................................................................ 10
COMM ANDS DESCRIPTION ..............................................................................................................11
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
7.11.
7.12.
8.
W
RITE
E
NABLE
(WREN) (06H) ........................................................................................................ 13
W
RITE
D
ISABLE
(WRDI) (04H)......................................................................................................... 13
R
EAD
S
TATUS
R
EGISTER
(RDSR) (05H)........................................................................................... 13
W
RITE
S
TATUS
R
EGISTER
(WRSR) (01H)......................................................................................... 14
R
EAD
D
ATA
B
YTES
(READ) (03H) .................................................................................................... 14
R
EAD
D
ATA
B
YTES
A
T
H
IGHER
S
PEED
(F
AST
R
EAD
) (0BH)................................................................. 15
P
AGE
P
ROGRAM
(PP) (02H)............................................................................................................. 15
S
ECTOR
E
RASE
(SE) (20H).............................................................................................................. 16
B
LOCK
E
RASE
(BE) (D8H) ............................................................................................................... 17
C
HIP
E
RASE
(CE) (60/C7H)........................................................................................................... 17
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID (REMS) (90H)........................................................................ 18
R
EAD
I
DENTIFICATION
(RDID) (9FH)............................................................................................... 19
ELECTRICAL CHARACTERISTICS ................................................................................................... 20
8.1.
8.2.
8.3.
8.4.
8.5.
8.6.
8.7.
8.8.
P
OWER
-
ON
T
IMING
........................................................................................................................... 20
I
NITIAL
D
ELIVERY
S
TATE
................................................................................................................... 20
D
ATA
R
ETENTION AND
E
NDURANCE
................................................................................................... 20
L
ATCH UP
C
HARACTERISTICS
............................................................................................................ 20
A
BSOLUTE
M
AXIMUM
R
ATINGS
.......................................................................................................... 21
C
APACITANCE
M
EASUREMENT
C
ONDITION
......................................................................................... 21
DC C
HARACTERISTICS
..................................................................................................................... 22
AC C
HARACTERISTICS
..................................................................................................................... 23
9.
10.
ORDERING INFORMATION................................................................................................................ 25
PACKAGE INFORMATION.............................................................................................................. 26
P
ACKAGE
SOP8 150MIL................................................................................................................ 26
P
ACKAGE
SOP8 208MIL................................................................................................................ 27
P
ACKAGE
DIP8 300MIL ................................................................................................................. 28
P
ACKAGE
VSOP8 208MIL ............................................................................................................. 29
P
ACKAGE
TSSOP8 173MIL ........................................................................................................... 30
10.1.
10.2.
10.3.
10.4.
10.5.
11.
REVISION HISTORY........................................................................................................................ 31
© 2014 Fremont Micro Devices Inc.
Confidential Rev1.0
DS25L04/02-page2
Fremont Micro Devices
Preliminary FT25L04/02
1. FEATURES
4M-bit/2M-bit Serial Flash
512K-byte/256K-byte
256 bytes per programmable page
Standard SPI
Standard SPI: SCLK, CS#, SI, SO,
High Speed Clock Frequency
40MHz for fast read with 30PF load
Program/Erase Speed
Page Program time: 2.0ms typical
Sector Erase time: 180ms typical
Block Erase time: 0.8 s typical
Chip Erase time: 6s/3s typical
Flexible Architecture
Sector of 4K-byte
Block of 64k-byte
Low Power Consumption
10mA maximum active current
5uA maximum standby current
Single Power Supply Voltage: Full voltage range:1.65~1.95V
Minimum 100,000 Program/Erase Cycle
Hardware Features
8-pin SOP8 (150mil)
8-pin SOP8 (200mil)
8-pin DIP8 (300mil)
8-pin VSOP8 (200mil)
8-pin TSSOP8 (173mil)
© 2014 Fremont Micro Devices Inc.
Confidential Rev1.0
DS25L04/02-page3
Fremont Micro Devices
Preliminary FT25L04/02
2. GENERAL DESCRIPTION
The FT25L04/02 (4M-bit/2M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI). SPI
clock frequency of up to 40MHz is supported for fast read command.
CONNECTION DIAGRAM
CS#
1
2
Top View
NC
3
6
SCLK
8
VCC
SO
7
NC
VSS
4
8 – LEAD SOP
5
SI
PIN DESCRIPTION
Pin Name
CS#
SO
VSS
SI
SCLK
VCC
I
I
I/O
I
O
Description
Chip Select Input
Data Output
Ground
Data Input
Serial Clock Input
Power Supply
© 2014 Fremont Micro Devices Inc.
Confidential Rev1.0
DS25L04/02-page4
Fremont Micro Devices
Preliminary FT25L04/02
BLOCK DIAGRAM
Write
Control
Logic
Status
Register
High Voltage
Generators
Page Address
Latch/Counter
Write Protect Logic
And Row Decode
SCLK
CS#
SI
SO
SPI
Command
&
Control
Logic
Flash
Memory
Column Decode And
256-Byte Page Buffer
Byte Address
Latch/Counter
© 2014 Fremont Micro Devices Inc.
Confidential Rev1.0
DS25L04/02-page5