FTF512K8-XXX5
512Kx8 MONOLITHIC FLASH
FEATURES
■
Access Times of 60, 70, 90, 120, 150ns
■
Packaging
32 pin, Hermetic Ceramic, 0.600" DIP
32 lead, Hermetic Ceramic, 0.400" SOJ
32 pin, Rectangular Ceramic Leadless Chip
Carrier
32 lead Flatpack
■
1,000,000 Erase/Program Cycles Minimum
■
Sector Erase Architecture
8 equal size sectors of 64K bytes each
Any combination of sectors can be concurrently
erased. Also supports full chip erase
PIN CONFIGURATION
32 DIP
32 CSOJ
32 Flatpack
■
Organized as 512Kx8
■
Commercial, Industrial and Military Temperature
Ranges
■
5 Volt Programming. 5V ± 10% Supply.
■
Low Power CMOS
■
Embedded Erase and Program Algorithms
■
TTL Compatible Inputs and CMOS Outputs
■
Page Program Operation and Internal Program
Control Time.
32 CLCC
T
OP
V
IEW
A12
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
T
OP
V
IEW
A15
A16
A18
V
CC
WE
A17
A14
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
I/O1
I/O2
I/O3
I/O4
I/O5
P
IN
D
ESCRIPTION
A
0
-
18
I/O
0-7
CS
OE
WE
V
CC
V
SS
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
1
I/O6
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
4 3 2 1 32 31 30
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
A14
A13
A8
A9
A11
OE
A10
CS
I/O7
A17
V
CC
WE
FTF512K8
A
BSOLUTE
M
AXIMUM
R
ATINGS
(1)
Parameter
Operating Temperature
Supply Voltage (V
CC
) (1)
Signal Voltage Range(any pin except A
9
) (2)
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Data Retention Mil Temp
Endurance - erase/program cycles (Mil Temp)
A
9
Voltage for sector protect (V
ID
) (3)
-55 to +125
-2.0 to +7.0
-2.0 to +7.0
-65 to +150
+300
20
100,000 min
-2.0 to +14.0
Unit
°C
V
V
°C
°C
years
cycles
V
R
ECOMMENDED
O
PERATING
C
ONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Operating Temp. (Ind.)
A
9
Voltage for Sector Protect
Symbol
V
CC
V
IH
V
IL
T
A
T
A
V
ID
Min
4.5
2.0
-0.5
-55
-40
11.5
Max
5.5
Vcc + 0.5
+0.8
+125
+85
12.5
Unit
V
V
V
°C
°C
V
NOTES:
1. Stresses above the absolute maximum rating may cause permanent
damage to the device. Extended operation at the maximum levels may
degrade performance and affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage
transitions, inputs may overshoot V
SS
to -2.0 V for periods of up to
20ns. Maximum DC voltage on output and I/O pins is V
CC
+ 0.5V.
During voltage transitions, outputs may overshoot to Vcc + 2.0 V for
periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage
transitions, A9 may overshoot Vss to -2V for periods of up to 20ns.
C
APACITANCE
(T
A
= +25°C)
Parameter
Address Input capacitance
Output Enable capacitance
Write Enable capacitance
Chip Select capacitance
Data I/O capacitance
Symbol
C
AD
C
OE
C
WE
C
CS
C
I/O
Conditions
V
I/O
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
V
I/O
= 0 V, f = 1.0 MHz
Max Unit
15
15
15
15
15
pF
pF
pF
pF
pF
This parameter is guaranteed by design but not tested.
DC C
HARACTERISTICS
- CMOS C
OMPATIBLE
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C
TO
+125°C)
Parameter
Input Leakage Current
Output Leakage Current
V
CC
Active Current for Read (1)
V
CC
Active Current for Program
or Erase (2)
V
CC
Standby Current
Output Low Voltage
Output High Voltage
Low V
CC
Lock-Out Voltage
Symbol
I
LI
I
LOx32
I
CC1
I
CC2
I
CC4
V
OL
V
OH1
V
LKO
Conditions
Min
V
CC
= 5.5, V
IN
= GND to V
CC
V
CC
= 5.5, V
IN
= GND to V
CC
CS = V
IL
, OE = V
IH
, f = 5MHz
CS = V
IL
, OE = V
IH
V
CC
= 5.5, CS = V
IH
, f = 5MHz
I
OL
= 8.0 mA, V
CC
= 4.5
I
OH
= -2.5 mA, V
CC
= 4.5
0.85 x V
CC
3.2
4.2
Max
10
10
50
60
1.6
0.45
Unit
µA
µA
mA
mA
mA
V
V
V
NOTES:
1. The I
CC
current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency
component typically is less than 2 mA/MHz, with OE at V
IH
.
2. I
CC
active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions: V
IL
= 0.3V, V
IH
= V
CC
- 0.3V
2
FTF512K8
AC C
HARACTERISTICS
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
,CS C
ONTROLLED
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C
TO
+125°C)
Parameter
Write Cycle Time
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
Chip Programming Time
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7µs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase time is 8sec.
t
AVAV
t
WLEL
t
ELEH
t
AVEL
t
DVEH
t
EHDX
t
ELAX
t
EHEL
t
WHWH1
t
WHWH2
t
GHEL
0
11
64
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
CPH
Symbol
-60
Min
60
0
40
0
40
0
40
20
300
15
0
11
64
Max
-70
Min
70
0
45
0
45
0
45
20
300
15
0
11
64
Max
Min
90
0
45
0
45
0
45
20
300
15
0
11
64
-90
Max
-120
Min
120
0
50
0
50
0
50
20
300
15
0
11
64
Max
-150
Min
150
0
50
0
50
0
50
20
300
15
Max
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
sec
sec
Unit
AC TEST CIRCUIT
Parameter
I
OL
AC T
EST
C
ONDITIONS
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Current Source
D.U.T.
C
eff
= 50 pf
V
Z
1.5V
(Bipolar Supply)
I
OH
Current Source
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
W.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
FTF512K8
AC C
HARACTERISTICS
W
RITE
/E
RASE
/P
ROGRAM
O
PERATIONS
, WE C
ONTROLLED
(V
CC
= 5.0V, T
A
= -55°C
TO
+125°C)
Parameter
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time before Write
V
CC
Set-up Time
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (4)
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7µs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase time is 8sec.
4. For Toggle and Data Polling.
t
OES
t
OEH
0
10
64
Symbol
Min
t
AVAV
t
ELWL
t
WLWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
tvcs
0
50
11
0
10
64
t
WC
t
CS
t
WP
t
AS
t
DS
t
DH
t
AH
t
WPH
60
0
40
0
40
0
40
20
300
15
0
50
11
0
10
64
-60
Max
Min
70
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-70
Max
Min
90
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-90
Max
-120
Min
120
0
50
0
50
0
50
20
300
15
0
50
11
Max
-150
Min
150
0
50
0
50
0
50
20
300
15
Max
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ms
µs
sec
ns
ns
sec
Unit
AC C
HARACTERISTICS
R
EAD
O
NLY
O
PERATIONS
(V
CC
= 5.0V, T
A
= -55°C
TO
+125°C)
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output High Z (1)
Output Enable High to Output High Z (1)
Output Hold from Address, CS or OE
Change, whichever is First
NOTES:
1. Guaranteed by design, but not tested
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
0
60
60
60
35
20
20
0
Symbol
-60
Min
Max
Min
70
70
70
35
20
20
0
-70
Max
Min
90
90
90
35
20
20
0
-90
Max
-120
Min
120
120
120
50
30
30
0
Max
-150
Min
150
150
150
55
35
35
Max
ns
ns
ns
ns
ns
ns
ns
Unit
4
FTF512K8
C WAVEFORMS FOR READ OPERATIONS
t
RC
Addresses
t
ACC
CS
t
DF
OE
t
OE
Addresses Stable
WE
t
CE
t
OH
High Z
Outputs
High Z
Output Valid
WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED
Data Polling
Addresses
5555H
t
WC
CS
t
GHWL
OE
t
WP
WE
t
CS
t
WPH
t
DH
Data
t
DS
t
OH
A0H
PD
t
OE
t
DF
t
WHWH1
t
AS
PA
t
AH
PA
t
RC
I/O
7
I/O
OUT
5.0 V
t
CE
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. I/O
7
is the output of the complement of the data written to the device.
4. I/O
OUT
is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
5
