Finisar
Preliminary Product Specification
DWDM GBIC Transceiver
FTR-1631-XX
PRODUCT FEATURES
•
•
•
•
•
•
•
•
•
•
Up to 2.7 Gb/s bi-directional data
links
Standard GBIC footprint
Temperature-stabilized DWDM-
rated DFB laser transmitter
100GHz ITU Grid, C Band
Low dispersion DFB laser suitable
for metro networking applications
Metal enclosure for low EMI
Extended operating range: 0°C to
70°C case temperature
Wavelength controlled within
±
0.1
nm over life and temperature
Extended link budget with APD
receiver technology
OC-48 LR-2 compliant
APPLICATIONS
•
•
•
Amplified DWDM networks
Bandwidth aggregation
Ring topologies with OADM
Finisar’s Dense Wavelength-Division Multiplexing (DWDM) transceivers offer DWDM
transport with dramatically lower power and cost in a standard pluggable GBIC package.
The FTR-1631 is designed expressly for service providers deploying DWDM networking
equipment in metropolitan access and core networks.
The
FTR-1631 has serial identification features as described for Module Definition “4”
GBICs in the GBIC Specification Revision 5.5
1
. In addition, digital diagnostic features
are implemented as described in Finisar Application Note AN-2030, “Digital Diagnostic
Monitoring Interface for Optical Transceivers”
2
.
©
Finisar Corporation
Rev J, August 2004
PRELIMINARY and Confidential
Page 1
Finisar
PRODUCT SELECTION
Product Code
FTR-1631-17
FTR-1631-18
FTR-1631-19
FTR-1631-20
FTR-1631-21
FTR-1631-22
FTR-1631-23
FTR-1631-24
FTR-1631-25
FTR-1631-26
FTR-1631-27
FTR-1631-28
FTR-1631-29
FTR-1631-30
FTR-1631-31
FTR-1631-32
FTR-1631-33
FTR-1631-34
FTR-1631-35
FTR-1631-36
FTR-1631-37
FTR-1631-38
FTR-1631-39
FTR-1631-40
FTR-1631-41
FTR-1631-42
FTR-1631-43
FTR-1631-44
FTR-1631-45
FTR-1631-46
FTR-1631-47
FTR-1631-48
FTR-1631-49
FTR-1631-50
FTR-1631-51
FTR-1631-52
FTR-1631-53
FTR-1631-54
FTR-1631-55
FTR-1631-56
FTR-1631-57
FTR-1631-58
FTR-1631-59
FTR-1631-60
FTR-1631-61
Frequency (THz)
191.7
191.8
191.9
192.0
192.1
192.2
192.3
192.4
192.5
192.6
192.7
192.8
192.9
193.0
193.1
193.2
193.3
193.4
193.5
193.6
193.7
193.8
193.9
194.0
194.1
194.2
194.3
194.4
194.5
194.6
194.7
194.8
194.9
195.0
195.1
195.2
195.3
195.4
195.5
195.6
195.7
195.8
195.9
196.0
196.1
Center Wavelength (nm)
1563.86
1563.05
1562.23
1561.42
1560.61
1559.79
1558.98
1558.17
1557.36
1556.55
1555.75
1554.94
1554.13
1553.33
1552.52
1551.72
1550.92
1550.12
1549.32
1548.51
1547.72
1546.92
1546.12
1545.32
1544.53
1543.73
1542.94
1542.14
1541.35
1540.56
1539.77
1538.98
1538.19
1537.40
1536.61
1535.82
1535.04
1534.25
1533.47
1532.68
1531.90
1531.12
1530.33
1529.55
1528.77
©
Finisar Corporation
Rev J, August 2004
PRELIMINARY and Confidential
Page 2
FTR-1631-XX DWDM GBIC Preliminary Product Specification
Finisar
I.
Pin Out
Pin Name
RX_LOS
GND
GND
MOD_DEF(0)
MOD_DEF(1)
MOD_DEF(2)
TX_DISABLE
GND
GND
TX_FAULT
GND
-RX_DAT
+RX_DAT
GND
V
CC
V
CC
GND
+TX_DAT
-TX_DAT
GND
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Sequence
2
2
2
2
2
2
2
2
2
2
1
1
1
1
2
2
1
1
1
1
Table 1. GBIC to Host Connector Pin Assignment
“Sequence” indicates the order in which pins make contact when the device is hot
plugged. See “Table 3: Signal Definitions” in the GBIC Specification Revision 5.5
1
for a description of the function of each pin listed above.
©
Finisar Corporation
Rev J, August 2004
PRELIMINARY and Confidential
Page 3
FTR-1631-XX DWDM GBIC Preliminary Product Specification
Finisar
II.
Electrical Power Interface
The GBIC specification calls for a range of 4.75V to 5.25 volts as described in Table 2.
The maximum voltage of 6V is not to be applied continuously.
Parameter
Supply Current
Inrush Current
Maximum Voltage
Input Voltage
Symbol
I
s
I
surge
V
max
V
cc
4.75
5.0
Min
Typ
250
Max
400
30
6
5.25
Units
mA
mA
V
V
Referenced to GND
Notes/Conditions
=300 msec above steady
state current
Table 2. Electrical Power Interface
III.
Low Speed Signals
RX_LOS, TX_DISABLE, and TX_FAULT are TTL signals as described in Table 3.
MOD_DEF(1) (SCL) and MOD_DEF(2) (SDA) are open drain CMOS signals (see
section IX, “Serial Communication Protocol”). Both MOD_DEF(1) and MOD_DEF(2)
must be pulled up to host_Vcc. For more detailed information, see sections 5.3.1 – 5.3.8
in the GBIC Specification Revision 5.5
1
.
Parameter
GBIC Output LOW
GBIC Output HIGH
GBIC Input LOW
Symbol
V
OL
Min
0
Max
0.5
Units Notes/Conditions
V
GBIC Input HIGH
4.7k to 10k pull-up to host_Vcc,
measured at host side of connector
V
OH
host_Vcc -
host_Vcc +
V
4.7k to 10k pull-up to host_Vcc,
0.5
0.3
measured at host side of connector
V
IL
0
0.8
V
4.7k to 10k pull-up to Vcc,
measured at GBIC side of
connector
V
IH
2
Vcc + 0.3
V
4.7k to 10k pull-up to Vcc,
measured at GBIC side of
connector
Table 3. Low Speed Signals – Electronic Characteristics
©
Finisar Corporation
Rev J, August 2004
PRELIMINARY and Confidential
Page 4
FTR-1631-XX DWDM GBIC Preliminary Product Specification
Finisar
Parameter
RX_LOS Assert Level
RX_LOS Deassert Level
RX_LOS Hysteresis
RX_LOS Assert Delay
RX_LOS Negate Delay
TX_DISABLE Assert Time
Symbol
Min
-42
Typ
-36
-34
2
Max
Units Notes/Conditions
dBm
dBm
dB
µsec
µsec
-32
300
150
t_loss_on
t_loss_off
From detection of loss of signal
to assertion of RX_LOS
TX_DISABLE Negate Time
TX_DISABLE Reset Time
TX_FAULT Assert
From detection of presence of
signal to negation of RX_LOS
t_off
1.5
msec Rising edge of TX_DISABLE to
fall of output signal below 10%
of nominal
t_on
6.0
msec Falling edge of TX_DISABLE
to rise of output signal above
90% of nominal. Time
indicated is under steady-state
temperature conditions.
t_reset
10
µsec
TX_DISABLE HIGH before
TX_DISABLE set LOW
-0.1
0.1
nm TX_Fault will assert before the
device is outside of specified
wavelength range
Table 4. Low Speed Signal Parameters
IV. High Speed Electrical Interface
All high-speed PECL signals are AC coupled internally.
Parameter
Data Input Voltage
Data Output Voltage
PECL rise/fall
Bit Error Rate
Tx Input Impedance
Rx Output Impedance
Symbol
V
in
V
out
T
r
,T
f
BER
Z
in
Z
out
75
75
Min
650
370
Typ
Max
2000
2000
150
10
-12
Ohm
Ohm
Units
mV
mV
psec
Notes/Conditions
PECL differential peak - peak
PECL differential peak - peak
20% -80% Differential
PRBS 2
23
- 1 test data pattern
Table 5. High Speed Electrical Interface
©
Finisar Corporation
Rev J, August 2004
PRELIMINARY and Confidential
Page 5