GS809C and GS810C
Microprocessor Reset Monitors
uct
rod
wP
Ne
Pin Configuration
SOT-23 (Top View)
GND
1
3
Reset
Output
2
V
cc
Description
• The GS809C and 810C are system supervisor
circuits designed to monitor V
CC
in digital systems
and provide a reset signal to the host processor
when necessary. No external components are
required.
• When the processor power supply voltage drops
below the reset threshold, the reset output is driven
active, in less than 40µs (T
D1
). Reset is main-
tained active for a time period (T
D2
), after the V
cc
rises above the threshold voltage.
• To prevent jitter, the reset threshold voltage has a
built-in hysteresis of 0.4% of V
TH
.
• The GS809C has an active-low reset output, while
the GS810C has an active-high reset output. Both
devices have push/pull output drives.
• The reset signal is guaranteed valid, down to
V
cc
= 1.0V.
• Low supply current of 3µA makes these devices
well suited for battery powered applications. They
are designed to reject fast transients from causing
false resets.
• Both devices are available in a space-saving
SOT-23 package.
Fig. 1 – Typical Application Diagram
V
CC
V
CC
GS809C
Reset
V
CC
Processor
Reset
Input
GND
GND
Applications
• Computers
• Battery Powered Equipment
• Critical uProcessor and uController power supply
monitoring
Features
• Tight reset voltage tolerances ± 1.5%
• 4 reset active timeout period options
• Low quiescent current: < 3µA
• 9 reset threshold options from 2.1V to 4.63V
• Reset output guaranteed down to 1.0V
• No external components
• V
cc
Transient immunity
• Wide temperature range –40°C to +85°C
1 of 6
10/22/01
GS809C and GS810C
Microprocessor Reset Monitors
Ordering Information
Reset Active Low
GS809CxxEUx
GS810CxxEUx
Reset Active High
Reset Timeout
Period
Default: 210mS
E: 150mS
D: 30mS
A : 1.5mS
Reset Voltage
Options
L
M
J
T
S
27
R
24
21
V
th
= 4.63V
V
th
= 4.38V
V
th
= 4.0V
V
th
= 3.08V
V
th
= 2.93V
V
th
= 2.7V
V
th
= 2.63V
V
th
= 2.4V
V
th
= 2.1V
Please contact your local General Semiconductor Sales Office for availability of other Threshold Voltage options.
Marking Information
X XX XX
Date Code
Year -- Week
Threshold Voltage
26: 2.63V 38: 3.8V 46: 4.63V Etc.
No letters
A:
D:
E:
G:
GS809C,
1.5mS
GS809C, 30.0mS
GS809C, 150.0mS
GS809C, 210.0mS
L:
Q:
R:
S:
GS810C,
1.5mS
GS810C, 30.0mS
GS810C, 150.0mS
GS810C, 210.0mS
2 of 6
GS809C and GS810C
Microprocessor Reset Monitors
Absolute Maximum Ratings
(1)
Parameter
Supply Voltage
Reset/Reset
Input Current, V
cc
Output Current, Reset/Reset
dV/dT (V
cc
)
Operating Temperature Range
Storage Temperature Range
Power Dissipation (T
A
≤
70°C)
SOT-23 (Derate 4mW/°C above 70°C)
T
A
T
stg
P
D
Symbol
V
cc
Value
6.0
–0.3 to (V
cc
+ 0.3)
20
20
100
–40 to +85
–65 to +150
260
Unit
V
V
mA
mA
V/µS
°C
°C
mW
Note:
(1) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
Electrical Characteristics
Parameter
V
cc
Range
T
A
= 25°C unless otherwise noted.
Symbol
V
RANGE
Test Conditions
Min
1
Typ
–
–
–
–
V
THNOM
V
THNOM
0.4
Max
5.5
5.5
3.0
5.0
V
THNOM
+1.5%
V
THNOM
+2.0%
Unit
V
µA
T
A
= –40 to +85°C
Supply Current
I
CC
Vcc = 3.0V
Vcc=3.0V, T
A
= –40 to +85°C
Reset Threshold
Threshold Hysteresis
Reset Threshold
Temperature Coefficient
Reset Output Voltage Low
809C/810C
809C V
cc
< V
TH min
810C V
cc
> V
TH max
T
A
= –40 to +85°C
I
SINK
= 1.2mA
809C V
cc
> V
TH max
810C V
cc
< V
TH min
T
A
= –40 to +85°C
I
SOURCE
= 0.5mA
V
CC
= V
TH
– 100mV
T
A
= –40 to +85°C
T
A
= –40 to +85°C
V
TH
T
A
= –40 to +85°C
V
TH HIST
1
–
–
V
THNOM
–1.5%
V
THNOM
–2.0%
V
%V
TH
–
30
–
ppm/°C
V
OL
–
–
0.5
V
Reset Output Voltage High
809C/810C
V
OH
0.8V
CC
–
–
V
V
CC
to Reset Delay
Reset Timeout Period
T
D1
T
D2
–
T
D2NOM
–35%
40
T
D2NOM
–
T
D2NOM
+35%
µS
mS
3 of 6
GS809C and GS810C
Microprocessor Reset Monitors
Ratings and
Characteristic Curves
(T
Fig. 2 – Timing Diagram
A
= 25°C unless otherwise noted)
V
TH
V
TH
V
CC
T
D2
Reset
50%
T
D1
50%
T
D2
Reset
50%
T
D1
50%
Fig. 3 – Transient Rejection
Supply (V
CC
) Transients
Transient Duration (µS)
140
120
100
80
60
40
20
0
0.01
These devices have a certain immunity to fast negative
going transients. The graph titled “Transient Rejection”
shows the maximum allowable transient amplitude and
duration to avoid triggering an unintended reset. As
shown in the graph shorter transients can have larger
amplitudes without triggering resets.
0.1
1
Transient Amplitude (V)
4 of 6
GS809C and GS810C
Microprocessor Reset Monitors
Ratings and
Characteristic Curves
(T
220
A
= 25°C unless otherwise noted)
Fig. 4 – Reset Time vs. Temperature
2.35
Fig. 5 – I
CC
vs. Temperature
215
210
205
GS809CREU
Supply Current @5V (µA)
2.30
Reset Time (mS)
2.25
GS809CREU
2.20
200
195
2.15
190
--50
--20
10
40
70
100
130
2.10
--50
--20
10
40
70
100
130
Temperature (°C)
Temperature (°C)
Fig. 6 – Reset V
th
vs. Temperature
2.650
2.648
2.646
2.644
1.6
85°C
2
Fig. 7 – I
CC
vs. V
CC
Reset V
th
(V)
40°C
2.640
2.638
2.636
2.634
2.632
2.630
--50
--20
GS809CREU
I
CC
(µA)
2.642
1.2
0°C
0.8
0.4
0
10
40
70
100
130
0
1
2
3
4
5
Temperature (°C)
V
CC
(V)
Fig. 8 – TD1 Delay vs. Temperature
43
42
TD1 Delay (µS)
41
40
39
38
37
--40
--20
0
20
40
60
80
100
Temperature (°C)
5 of 6
