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H0700KC17L

Symmetrical GTO SCR, 700A I(T)RMS, 1700V V(DRM), 765V V(RRM), 1 Element

器件类别:模拟混合信号IC    触发装置   

厂商名称:IXYS

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
IXYS
Reach Compliance Code
unknown
配置
SINGLE
最大直流栅极触发电流
1500 mA
JESD-30 代码
O-CXDB-X4
元件数量
1
端子数量
4
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装形状
ROUND
封装形式
DISK BUTTON
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
最大均方根通态电流
700 A
断态重复峰值电压
1700 V
重复峰值反向电压
765 V
表面贴装
YES
端子形式
UNSPECIFIED
端子位置
UNSPECIFIED
处于峰值回流温度下的最长时间
NOT SPECIFIED
触发设备类型
SYMMETRICAL GTO SCR
文档预览
WESTCODE
An
Date:- 16 Apr, 2004
Data Sheet Issue:- 1
IXYS
Company
Fast Symmetrical Gate Turn-Off Thyristor
Type H0700KC17#
Absolute Maximum Ratings
MAXIMUM
LIMITS
1700
1800
100-1360
100-1360
VOLTAGE RATINGS
V
DRM
V
RSM
V
RRM
V
RSM
Repetitive peak off-state voltage, (note 1)
Non-repetitive peak off-state voltage, (note 1)
Repetitive peak reverse voltage
Non-repetitive peak reverse voltage
UNITS
V
V
V
V
RATINGS
I
TGQ
L
s
I
T(AVM)
I
T(RMS)
I
TSM
I
TSM2
It
di/dt
cr
P
FGM
P
RGM
I
FGM
V
RGM
t
off
t
on
T
j
T
stg
2
MAXIMUM
LIMITS
700
0.3
360
700
4
7.2
80×10
1000
160
5
100
18
45
20
-40 to +125
-40 to +150
3
UNITS
A
µH
A
A
kA
kA
As
A/µs
W
kW
A
V
µs
µs
°C
°C
2
Peak turn-off current, (note 2)
Snubber loop inductance, I
TM
=I
TGQ
, (note 2)
Mean on-state current, T
sink
=55°C (note 3)
Nominal RMS on-state current, 25°C (note 3)
Peak non-repetitive surge current t
p
=10ms
Peak non-repetitive surge current, (Note 4)
I t capacity for fusing t
p
=10ms
Critical rate of rise of on-state current, (note 5)
Peak forward gate power
Peak reverse gate power
Peak forward gate current
Peak reverse gate voltage (note 6).
Minimum permissible off-time, I
TM
=I
TGQ
, (note 2)
Minimum permissible on-time
Operating temperature range
Storage temperature range
2
Notes:-
1) V
GK
=-2Volts.
2) T
j
=125°C, V
D
=80%V
DM
, V
DM
<V
DRM
, di
GQ
/dt=40A/µs, C
S
=1.5µF.
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, t
p
=2ms
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
Data Sheet. Type H0700KC17# Issue 1
Page 1 of 15
April, 2004
WESTCODE
An IXYS Company
Characteristics
Parameter
V
TM
I
L
I
H
dv/dt
cr
I
DM
I
RM
I
GKM
Maximum peak on-state voltage
Latching current
Holding current.
Critical rate of rise of off-state voltage
Peak off state current
Peak reverse current
Peak negative gate leakage current
Fast Symmetrical Gate Turn-Off Thyristor type H0700KC17#
MIN
-
-
-
800
-
-
-
-
TYP
2.4
5
5
-
-
-
-
0.9
0.8
0.7
2.5
0.4
20
0.5
3
0.5
5
190
580
25
-
-
-
-
-
120
MAX TEST CONDITIONS
2.75
-
-
-
30
40
200
-
-
-
6
1.5
200
-
5
-
6.5
-
700
35
-
I
G
=1.5A, I
T
=700A
T
j
=25°C
T
j
=25°C
V
D
=80%V
DRM
, V
GR
=-2V
Rated V
DRM
, V
GR
=-2V
Rated V
RRM
V
GR
=-16V
T
j
=-40°C
T
j
=25°C
T
j
=125°C
T
j
=-40°C
T
j
=25°C
T
j
=125°C
V
D
=50%V
DRM
, I
TGQ
=700A, I
GM
=30A, di
G
/dt=15A/µs
T
j
=25°C, di/dt=300A/µs, (10%I
GM
to 90%V
D
)
Conditions as for t
d
, (10%I
GM
to 10%V
D
)
V
D
=50%V
DRM
, I
TGQ
=700A, C
S
=1.5µF,
di
GQ
/dt=40A/µs, V
GR
=-16V, (90%I
TGQ
to 10%I
TGQ
)
Conditions as for t
f
, (10%I
GQ
to 10%I
TGQ
)
Conditions as for t
f
Conditions as for t
f
Conditions as for t
f
, (10%I
TGQ
to I
TGQ
<1A)
Conditions as for t
f
V
D
=25V, R
L
=25mΩ
V
D
=25V, R
L
=25mΩ
UNITS
V
A
A
V/µs
mA
mA
mA
V
V
V
A
A
mA
µs
V
GT
Gate trigger voltage
-
-
-
I
GT
Gate trigger current
-
-
t
d
t
gt
t
f
t
gq
I
gq
Q
gq
t
tail
t
gw
Delay time
Turn-on time
Fall time
Turn-off time
Turn-off gate current
Turn-off gate charge
Tail time
Gate off-time (see note 3).
-
-
-
-
-
-
-
80
-
µs
µs
µs
A
µC
µs
µs
K/W
K/W
K/W
kN
g
0.063 Double side cooled
0.21
0.09
9.0
-
Cathode side cooled
Anode side cooled
(see note 2)
R
thJK
Thermal resistance junction to sink
-
-
F
W
t
Mounting force
Weight
4.5
-
Notes:-
1) Unless otherwise indicated T
j
=125
o
C.
2) For other clamping forces, consult factory.
3) The gate off-time is the period during which the gate circuit is
required to remain low impedance to allow for the passage
of tail current.
Data Sheet. Type H0700KC17# Issue 1
Page 2 of 15
April, 2004
WESTCODE
An IXYS Company
Notes on ratings and characteristics.
1. Maximum Ratings.
Fast Symmetrical Gate Turn-Off Thyristor type H0700KC17#
1.1 Off-state voltage ratings.
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For
other gate conditions see the curves of figure 5. It should be noted that V
DRM
is the repeatable peak
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, V
DC
should ideally be limited to 60% V
DRM
in this product.
Diagram 1.
1.2 Reverse voltage rating.
All devices in this series have a minimum V
RRM
of 100 Volts. If specified at the time of order, a V
RRM
up to
80%V
DRM
is available.
1.3 Peak turn-off current.
The figure given in maximum ratings is the highest value for normal operation of the device under
conditions given in note 2 of ratings. For other combinations of I
TGQ
, V
D
and C
s
see the curves of figures
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent C
S
should be used and L
s
<0.3µH must be ensured for the curves to be
applied.
Ls
Ds
R
Cs
Diagram 2.
1.4 R.M.S and average current.
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° half-
sinewave. These are included as a guide to compare the alternative types of GTO thyristors available,
values can not be applied to practical applications, as they do not include switching losses.
1.5 Surge rating and I t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 4.
1.6 Snubber loop inductance.
Use of GTO thyristors with snubber loop inductance, L
s
<0.3µH implies no dangerous V
s
voltages (see
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
V
s
should be limited to 600 Volts to avoid possible device failure.
2
Data Sheet. Type H0700KC17# Issue 1
Page 3 of 15
April, 2004
WESTCODE
An IXYS Company
Fast Symmetrical Gate Turn-Off Thyristor type H0700KC17#
1.7 Critical rate of rise of on-state current
The value given is the maximum repetitive rating, but does not imply any specific operating condition. The
high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum
condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt
is possible. Where the device is required to operate with infrequent high current pulses, with natural
commutation (i.e. not gate turn-off), then di/dt>5kA/µs is possible. For this type of operation individual
specific evaluation is required.
1.8 Gate ratings
The absolute conditions above which the gate may be damaged. It is permitted to allow V
GK(AV)
during turn-
off (see diagram 10) to exceed V
RGM
which is the implied DC condition.
1.9 Minimum permissible off time.
This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in
the ratings applies only to operating conditions of ratings note 2. For other operating conditions see the
curves of figure 18.
1.10 Minimum permissible on-time.
Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. Where a
simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges
through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time
constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode
circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon
the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type H0700KC17# Issue 1
Page 4 of 15
April, 2004
WESTCODE
An IXYS Company
2 Characteristics
Fast Symmetrical Gate Turn-Off Thyristor type H0700KC17#
2.1 Instantaneous on-state voltage
Measured using a 500µs square pulse, see also the curves of figure 2 for other values of I
TM
.
2.2 Latching and holding current
These are considered to be approximately equal and only the latching current is measured, type test only
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is
monitored on an oscilloscope while V
D
is increased, until the current is seen to flow during the un-gated
period between the end of I
G
and the application of reverse gate voltage. Test frequency is 100Hz with I
GM
& I
G
as for t
d
of characteristic data.
I
GM
I
G
100µs
Gate current
16V
100µs
R1
Unlatched
Anode current
unlatched condition
CT
C1
DUT
Gate-drive
Vs
Anode current
Latched condition
Latched
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is
open circuit or R
GK
is high impedance. Typical values: - dv/dt<30V/µs for R
GK
>10Ω.
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage.
For I
DRM
& I
RRM
see notes 1.1 & 1.2 for gate leakage I
GK
, the off-state gate circuit is required to sink this
leakage and still maintain minimum of –2 Volts. See diagram 6.
Diagram 6.
Data Sheet. Type H0700KC17# Issue 1
Page 5 of 15
April, 2004
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