CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
2. If an input signal is applied before the supplies are powered up, the input current must be limited to these maximum values.
Electrical Specifications
PARAMETER
V
SUPPLY
=
5V,
R
L
= 10k, V
CS
= 0.8V, Unless Otherwise Specified
TEST CONDITIONS
(NOTE 4)
TEMP. (°C)
MIN
TYP
MAX
UNITS
DC SUPPLY CHARACTERISTICS
Supply Voltage
Supply Current (V
OUT
= 0V)
V
CS
= 0.8V
V
CS
= 0.8V
V
CS
= 2.0V
V
CS
= 2.0V
ANALOG DC CHARACTERISTICS
Output Voltage Swing Without Clipping V
OUT
= V
IN
V
IO
20mV
25, 70
0
Output Current
Input Bias Current
Output Offset Voltage
Output Offset Voltage Drift (Note 3)
SWITCHING CHARACTERISTICS
Turn-On Time
Turn-Off Time
Output Glitch During Switching
DIGITAL DC CHARACTERISTICS
Input Logic High Voltage
Input Logic Low Voltage
CLK1, CLK2 Input Current
CS, A0, A1 Input Current
AC CHARACTERISTICS
Insertion Loss
1V
P-P
25
Full
Channel-to-Channel Insertion Loss
Match
Full
-
-
-
0.055
0.07
0.004
0.063
0.08
0.006
dB
dB
dB
0 to 4V
0 to 4V
Full
Full
Full
Full
2
-
-
-2
-
-
40
-
-
0.8
50
2
V
V
A
A
25
25
25
-
-
-
160
320
10
-
-
-
ns
ns
mV
Full
Full
Full
Full
2.7
2.4
15
-
-10
-
2.8
2.5
20
30
-
25
-
-
-
50
10
50
V
V
mA
A
mV
V/C
Full
25, 70
0
25, 70
0
4.5
-
-
-
-
5.0
10.5
-
400
400
5.5
13
15.5
450
580
V
mA
mA
A
A
FN3956 Rev 4.00
June 1, 2006
Page 2 of 4
HA4344B
Electrical Specifications
PARAMETER
-3dB Bandwidth
V
SUPPLY
=
5V,
R
L
= 10k, V
CS
= 0.8V, Unless Otherwise Specified
(Continued)
TEST CONDITIONS
R
S
= 47, C
L
= 10pF
R
S
= 29, C
L
= 20pF
R
S
= 16, C
L
= 33pF
R
S
= 9, C
L
= 52pF
0.1dB
Flat Bandwidth
R
S
= 47, C
L
= 10pF
R
S
= 29, C
L
= 20pF
R
S
= 16, C
L
= 33pF
R
S
= 9, C
L
= 52pF
Input Resistance
Input Capacitance
Enabled Output Resistance
Disabled Output Capacitance
Differential Gain
Differential Phase
Off Isolation
Crosstalk Rejection
Slew Rate (1.5V
P-P
, +SR/-SR)
V
CS
= 2.0V
4.43MHz (Note 3)
4.43MHz (Note 3)
1V
P-P
, 100MHz, V
CS
= 2.0V
1V
P-P
, 30MHz
R
S
= 47, C
L
= 10pF
R
S
= 29, C
L
= 20pF
R
S
= 16, C
L
= 33pF
R
S
= 9, C
L
= 52pF
Total Harmonic Distortion (Note 3)
Disabled Output Resistance
NOTES:
3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
4. Units are 100% tested at 25°C; guaranteed, but not tested at 0°C and 70°C.
V
CS
= 2.0V
(NOTE 4)
TEMP. (°C)
25
25
25
25
25
25
25
25
Full
Full
Full
Full
25
25
Full
Full
25
25
25
25
Full
Full
MIN
-
-
-
-
-
-
-
-
200
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
350
300
220
160
150
110
100
70
400
1.5
15
2.5
0.01
0.01
70
80
1400/1490
1200/1260
870/940
750/710
0.01
12
MAX
-
-
-
-
-
-
-
-
-
-
-
-
0.02
0.02
-
-
-
-
-
-
0.1
-
UNITS
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
k
pF
pF
%
°
dB
dB
V/s
V/s
V/s
V/s
%
M
AC Test Circuit
500
400
510
HA4344B
V
IN
75
R
S
C
X
10k
-
+
HFA1100
75
V
OUT
NOTE: C
L
= C
X
+ Test Fixture Capacitance.
FN3956 Rev 4.00
June 1, 2006
Page 3 of 4
HA4344B
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
H
E
-B-
1
2
3
SEATING PLANE
-A-
D
-C-
A
h x 45°
0.25(0.010) M
B M
M16.15
(JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
SYMBOL
A
L
MILLIMETERS
MIN
1.35
0.10
0.33
0.19
9.80
3.80
5.80
0.25
0.40
16
8°
0°
8°
MAX
1.75
0.25
0.51
0.25
10.00
4.00
6.20
0.50
1.27
NOTES
-
-
9
-
3
4
-
-
5
6
7
-
Rev. 1 6/05
MIN
0.0532
0.0040
0.013
0.0075
0.3859
0.1497
0.2284
0.0099
0.016
16
0°
MAX
0.0688
0.0098
0.020
0.0098
0.3937
0.1574
0.2440
0.0196
0.050
A1
B
C
D
E
e
H
C
A1
0.10(0.004)
0.050 BSC
1.27 BSC
e
B
0.25(0.010) M
C A M
B S
h
L
N
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see
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