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HCF4007UBM1

Buffers & Line Drivers Dual Comp Inverter

器件类别:逻辑    逻辑   

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
ST(意法半导体)
零件包装代码
SOIC
包装说明
SOP-14
针数
14
Reach Compliance Code
compliant
其他特性
DUAL COMPLEMENTARY PAIR PLUS INVERTER
系列
4000/14000/40000
JESD-30 代码
R-PDSO-G14
JESD-609代码
e4
长度
8.65 mm
负载电容(CL)
50 pF
逻辑集成电路类型
INVERTER
湿度敏感等级
1
功能数量
3
输入次数
1
端子数量
14
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP14,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
电源
3/15 V
传播延迟(tpd)
110 ns
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压 (Vsup)
20 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
3.9 mm
Base Number Matches
1
文档预览
HCF4007UB
DUAL COMPLEMENTARY PAIR PLUS INVERTER
s
s
s
s
s
s
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
MEDIUM SPEED OPERATION
t
PD
= 30ns (Typ.) AT 10V
QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25°C
100% TESTED FOR QUIESCENT CURRENT
DIP
ORDER CODES
PACKAGE
DIP
SOP
DESCRIPTION
The HCF4007UB is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4007UB type is comprised of three
n-channel and three p-channel enhancement type
MOS transistors. The transistor elements are
accessible through the package terminals to
provide a convenient means for constructing the
various typical circuits as shown in typical
TUBE
bs
O
et
l
o
ro
P
e
uc
d
s)
t(
O
-
applications. More complex functions are possible
using multiple packages. Number shown in
parentheses indicate terminals that are connected
together to form the various configuration listed.
so
b
te
le
HCF4007UBEY
HCF4007UBM1
ro
P
uc
d
SOP
s)
t(
T&R
HCF4007UM013TR
PIN CONNECTION
March 2004
1/9
HCF4007UB
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN N°
2, 11
SYMBOL
S
P2
, S
P3
NAME AND FUNCTION
Source Connections to
2nd and 3rd p-channel
transistors
Drain Connections from
the 1st and 2nd p-channel
transistors
Drain Connections from
the 1st and 2nd n-channel
transistors
Source Connections to
the 2nd and 3rd n-channel
Common connection to
the 3rd p-channel and
n-channel transistor
drains
Gate connections to
n-channel and p-channel
of the three transistor
pairs
13, 1
D
P1
, D
P2
8, 5
4, 9
D
N1
, D
N2
S
N2
, S
N3
12
D
N/P3
LOGIC DIAGRAM
6, 3, 10
7
G
1
to G
3
V
SS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DD
V
I
I
I
P
D
T
op
Supply Voltage
DC Input Voltage
DC Input Current
Parameter
b
O
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V
SS
pin voltage.
et
l
so
T
stg
V
DD
V
I
T
op
Power Dissipation per Package
Power Dissipation per Output Transistor
Operating Temperature
Storage Temperature
od
r
P
e
uc
s)
t(
O
-
so
b
14
te
le
ro
P
uc
d
s)
t(
Negative Supply Voltage
Positive Supply Voltage
V
DD
Value
-0.5 to +22
-0.5 to V
DD
+ 0.5
±
10
200
100
-55 to +125
-65 to +150
Unit
V
V
mA
mW
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Supply Voltage
Input Voltage
Operating Temperature
Parameter
Value
3 to 20
0 to V
DD
-55 to 125
Unit
V
V
°C
2/9
HCF4007UB
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
I
(V)
0/5
0/10
0/15
0/20
0/5
0/10
0/15
5/0
10/0
15/0
0.5/4.5
1/9
1.5/13.5
4.5/0.5
9/1
13.5/1.5
2.5
4.6
9.5
13.5
0.4
0.5
1.5
V
O
(V)
|I
O
| V
DD
(µA) (V)
5
10
15
20
5
10
15
5
10
15
5
10
15
5
10
15
5
5
10
15
5
10
15
18
T
A
= 25°C
Min.
Typ.
0.01
0.01
0.01
0.02
4.95
9.95
14.95
0.05
0.05
0.05
4
8
12.5
4
8
12.5
Max.
0.25
0.5
1
5
4.95
9.95
14.95
0.05
0.05
0.05
Value
-40 to 85°C
Min.
Max.
7.5
15
30
150
4.95
9.95
14.95
-55 to 125°C
Min.
Max.
7.5
15
30
150
Unit
I
L
Quiescent Current
µA
V
OH
High Level Output
Voltage
Low Level Output
Voltage
High Level Input
Voltage
Low Level Input
Voltage
Output Drive
Current
V
OL
V
IH
V
IL
I
OH
I
OL
Output Sink
Current
Input Leakage
Current
Input Capacitance
0/5
0/5
0/10
0/15
0/5
0/10
0/15
0/18
I
I
C
I
The Noise Margin for both "1" and "0" level is: 1V min. with V
DD
=5V, 2V min. with V
DD
=10V, 2.5V min. with V
DD
=15V
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C, C
L
= 50pF, R
L
= 200KΩ, t
r
= t
f
= 20 ns)
O
bs
et
l
o
ro
P
e
Parameter
uc
d
s)
t(
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
O
-
-1.36
-0.44
-1.1
-3.0
0.44
1.1
3.0
so
b
te
le
1
2
2.5
r
P
d
o
1
2
2.5
uc
4
8
12.5
s)
t(
0.05
0.05
0.05
1
2
2.5
V
V
V
V
-3.2
-1
-2.6
-6.8
1
2.6
6.8
±0.1
7.5
-1.15
-0.36
-0.9
-2.4
0.36
0.9
2.4
±1
-1.1
-0.36
-0.9
-2.4
0.36
0.9
2.4
±1
mA
mA
µA
pF
Any Input
Any Input
±10
-5
5
Test Condition
V
DD
(V)
5
10
15
5
10
15
Min.
Value (*)
Typ.
55
30
25
100
50
40
Max.
110
60
50
200
100
80
Unit
Symbol
t
PLH
t
PHL
Propagation Delay Time
ns
t
TLH
t
THL
Transition Time
ns
(*) Typical temperature coefficient for all V
DD
value is 0.3%/°C.
3/9
HCF4007UB
TYPICAL APPLICATIONS
TRIPLE INVERTERS:
(14, 2, 11); (8,13); (1, 5); (4,
7, 9)
3-INPUT NOR GATE:
(13, 2); (1, 11); (12, 5, 8); (4,
7, 9)
3-INPUT NAND GATE:
(1, 12, 13); (2, 14, 11);
(4, 8); (5, 9)
DUAL BIDIRECTIONAL TRASMISSION
GATING:
(1, 5, 12); (2, 9); (11, 4); (8,13,10); (6, 3)
bs
O
et
l
o
ro
P
e
uc
d
s)
t(
O
-
so
b
te
le
ro
P
uc
d
s)
t(
4/9
HCF4007UB
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= 200KΩ
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAY TIMES
(f=1MHz; 50% duty cycle)
bs
O
et
l
o
ro
P
e
uc
d
s)
t(
O
-
so
b
te
le
ro
P
uc
d
s)
t(
5/9
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