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HCHP0705K2052FNT

RESISTOR, METAL GLAZE/THICK FILM, 0.2 W, 1 %, 100 ppm, 20500 ohm, SURFACE MOUNT, 0705, CHIP, ROHS COMPLIANT

器件类别:无源元件    电阻器   

厂商名称:Vishay(威世)

厂商官网:http://www.vishay.com

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
Objectid
1620494871
包装说明
SMT, 0705
Reach Compliance Code
unknown
ECCN代码
EAR99
其他特性
STANDARD: MIL-R-55342D
构造
Chip
JESD-609代码
e2
制造商序列号
HCHP
安装特点
SURFACE MOUNT
端子数量
2
最高工作温度
155 °C
最低工作温度
-55 °C
封装高度
0.5 mm
封装长度
1.91 mm
封装形状
RECTANGULAR PACKAGE
封装形式
SMT
封装宽度
1.27 mm
包装方法
TR; WAFFLE PACK
额定功率耗散 (P)
0.2 W
额定温度
70 °C
参考标准
MIL-R-55342D
电阻
20500 Ω
电阻器类型
FIXED RESISTOR
系列
HCHP HYBRID
尺寸代码
0705
表面贴装
YES
技术
METAL GLAZE/THICK FILM
温度系数
100 ppm/°C
端子面层
Tin/Silver (Sn/Ag) - with Nickel (Ni) barrier
端子形状
WRAPAROUND
容差
1%
工作电压
75 V
文档预览
CHP, HCHP
Vishay Sfernice
High Stability Resistor Chips (< 0.25 % at Pn at 70 °C during 1000 h)
Thick Film Technology
FEATURES
Vishay Sfernice thick film resistor chips are specially
designed to meet very stringent specifications in terms
of reliability, stability < 0.25 % at Pn at + 70 °C during
1000 h, homogeneity, reproducibility and quality.
They conform
MIL-R-55342 D.
to
specifications
NFC
83-240
and
Robust terminations
Large ohmic value range 0.1
Ω
to 100 MΩ
Tight tolerance to 0.5 %
CHP: Standard passivated version for
industrial, professional and military applications
HCHP: For high frequency applications
ESCC approved see CHPHR
SMD wraparound chip resistor
Halogen-free according to IEC 61249-2-21 definition
Compliant to RoHS directive 2002/95/0EC
Sputtered Thin Film terminations, with nickel barrier, are very
convenient for high operating conditions. They can withstand
thousands of very severe thermal shocks.
B (W/A), N (W/A) and F (one face) types are for solder reflow
assembly.
G (W/A) and W (one face) types are for wire bonding, gluing
and even high temperature solder reflow.
Evaluated to ESCC 4001/026 (see CHPHR datasheet).
DIMENSIONS
in millimeters (inches)
A
D
D
C
D
A
D
C
E
E
B
A
B
VALUE
TOL.
VALUE
TOL.
1.27
0.152
0.60
0502
0.127 (0.005)
(0.050)
(0.006)
(0.024)
1.27
0.152
1.27
0.127 (0.005)
0505
(0.050)
(0.006)
(0.050)
1.52
0.152
0.85
0603
0.127 (0.005)
(0.060)
(0.006)
(0.033)
0705/
1.91
0.152
1.27
0.127 (0.005)
0805
(0.075)
(0.006)
(0.050)
2.54
0.152
1.27
0.127 (0.005)
1005
(0.100)
(0.006)
(0.050)
3.05
0.152
1.60
1206
0.127 (0.005)
(0.120)
(0.006)
(0.063)
3.81
0.152
1505
1.32 (0.052)
0.127 (0.005)
(0.150)
(0.006)
5.08
0.152
2.54 (0.100)
0.127 (0.005)
2010
(0.200)
(0.006)
2.54
0.152
5.08 (0.200)
0.127 (0.005)
1020
(0.100)
(0.006)
5.58
0.152
2208
1.91 (0.075)
0.127 (0.005)
(0.220)
(0.006)
6.35
0.152
3.06 (0.120)
0.127 (0.005)
2512
(0.250)
(0.006)
2.54
0.152
2.54 (0.100)
0.127 (0.005)
1010
(0.100)
(0.006)
* Pb containing terminations are not RoHS compliant, exemptions may apply
CASE
SIZE
www.vishay.com
54
C
VALUE
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5
(0.020)
0.5 (0.020)
0.5 (0.020)
TOL.
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
VALUE
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
0.38 (0.015)
D/E
TOL.
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
0.127 (0.005)
For technical questions, contact:
sfer@vishay.com
Document Number: 52023
Revision: 25-Aug-09
CHP, HCHP
High Stability Resistor Chips
(< 0.25 % at Pn at 70 °C during 1000 h)
Thick Film Technology
SUGGESTED LAND PATTERN
(to IPC-7351A)
G
min.
X
max.
Z
max.
Vishay Sfernice
CASE SIZE
0502
0505
0603
0705/0805
1005
1206
1505
2010
1020
2208
2512
1010
DIMENSION in mm (inches)
Z
max.
1.82 (0.072)
1.82 (0.072)
2.37 (0.093)
2.76 (0.109)
3.39 (0.134)
3.90 (0.154)
4.66 (0.184)
5.93 (0.234)
3.39 (0.134)
6.43 (0.253)
7.20 (0.284)
3.39 (0.134)
G
min.
0.10 (0.004)
0.10 (0.004)
0.35 (0.014)
0.74 (0.029)
1.37 (0.054)
1.88 (0.074)
2.64 (0.104)
3.91 (0.154)
1.37 (0.054)
4.41 (0.174)
5.18 (0.204)
1.37 (0.054)
X
max.
0.73 (0.029)
1.40 (0.055)
0.98 (0.038)
1.40 (0.055)
1.40 (0.055)
1.73 (0.068)
1.45 (0.057)
2.67 (0.105)
5.21 (0.205)
2.04 (0.080)
3.19 (0.125)
2.67 (0.105)
ELECTRICAL SPECIFICATIONS
CASE SIZE
0502
0505
0603
0705/0805
1005
1206
1505
2010
1020
2208
2512
1010
POWER RATING
Pn
mW
50
125
125
200
250
250
500
1000
(2)
1000
(2)
750
2000
(2)
500
LIMITING ELEMENT
VOLTAGE
V
50
50
50
150
150
200
200
200
200
200
250
200
MAX. OVERLOAD
VOLTAGE
V
100
100
100
300
300
400
400
400
400
400
500
400
MAX.
RESISTANCE
(1)
25
10
25
25
50
50
75
100
10
100
100
25
UNIT WEIGHT
mg
1
3
2
4
5
8
8
26
25
21
42
12
Notes
(1)
Shall be read in conjunction with other tables
(2)
With special assembly care
Document Number: 52023
Revision: 25-Aug-09
For technical questions, contact:
sfer@vishay.com
www.vishay.com
55
CHP, HCHP
Vishay Sfernice
High Stability Resistor Chips
(< 0.25 % at Pn at 70 °C during 1000 h)
Thick Film Technology
PACKAGING
ESD packaging available: Waffle pack and plastic tape and
reel (low conductivity). Paper tapes available on request
(ESD only).
SIZE
NUMBER OF PIECES PER PACKAGE
WAFFLE
TAPE AND REEL
PACK
MIN.
MAX.
TAPE
WIDTH
ELECTRICAL SPECIFICATIONS
Resistance range:
Resistance tolerance:
Power dissipation:
Temperature coefficient:
0.1R to 100M
0.5 % to 10 %
Pn: 50 mW to 2 W
K: 100 ppm/°C
L: 200 ppm/°C
MECHANICAL SPECIFICATIONS
Substrate:
Technology:
Protection:
Terminations:
Alumina
Thick film (Ruthenium oxyde)
Epoxy coating
B (W/A):
SnPb over nickel
barrier for solder reflow
N (W/A):
SnAg over nickel
barrier for solder reflow
F (Flip Chip):
SnAg over nickel
barrier for solder reflow
W (one face) and G (W/A) type:
gold over nickel barrier for other
applications
CLIMATIC SPECIFICATIONS
Operating temp. range:
- 55 °C to + 155 °C
Note
For temperature up to 215 °C please consult Vishay Sfernice
0502
0505
100
0603
0805
1005
140
1206
1505
60
2010
1010
100
2208
60
1020
60
2512
45
Note
(2)
12 mm on request
4000
8 mm
100
1000
4000
1000
8 mm
(2)
8 mm
(2)
8 mm
(2)
8 mm
(2)
8 mm
(2)
PACKAGING RULES
Waffle Pack
Can be filled up to maximum quantity indicated in the table
here above, taking into account the minimum order quantity.
When quantity ordered exceeds maximum quantity of a
single waffle pack, the waffle packs are stacked up on the top
of each other and closed by one single cover.
To get “not stacked up” waffle pack in case of ordered
quantity > maximum number of pieces per package:
Please consult Vishay Sfernice for specific ordering
code
Tape and Reel
Can be filled up to maximum quantity indicated in the table
here above, taking into account the minimum order quantity.
When quantity ordered is between the MOQ and the
maximum reel capacity, only one reel is provided.
When several reels are needed for ordered quantity
within MOQ and maximum reel capacity: Please consult
Vishay Sfernice for specific ordering code
BEST TOL. AND TCR VERSUS OHMIC VALUE
(1)
TIGHTEST
TOLERANCE
0.5 % (D)
1 % (F)
2 % (G)
5 % (J)
OHMIC
VALUES
10
Ω
<
R
< 5M
5
Ω
<
R
< 10M
1
Ω
<
R
<
R
max.
0.1
Ω
<
R
<
R
max.
BEST TCR
ppm/°C
100 (K)
100 (K)
200 (L)
200 (L)
Note
(1)
Improved performance on request
CHIPS FOR HIGH FREQUENCY APPLICATIONS
The HF performance of flip chip and W/A types can be
improved on request.
Please ask for HCHP
POWER DERATING CURVE
Rated Power (%)
100
80
60
40
20
0
0
20
40
60 70
80
100
120
140 155
Ambient Temperature in °C
www.vishay.com
56
For technical questions, contact:
sfer@vishay.com
Document Number: 52023
Revision: 25-Aug-09
CHP, HCHP
High Stability Resistor Chips
(< 0.25 % at Pn at 70 °C during 1000 h)
Thick Film Technology
TYPICAL HF PERFORMANCE OF HCHP
2.0
1.8
1.6
1.4
1.2
1
Ω
10
Ω
2.0
1.8
1.6
1.4
1.2
1
Ω
10
Ω
Vishay Sfernice
|Z|/R
|Z|/R
1.0
0.8
0.6
0.4
0.2
0
1
10
100
1000
1 MΩ
100 kΩ
10 kΩ
100
Ω
200
Ω
1.0
0.8
0.6
100
Ω
1 kΩ
200
Ω
1 kΩ
0.4
0.2
0
10 000
1
10
100
1000
1 MΩ
100 kΩ
10 kΩ
10 000
Size 0603 (W/A)
f (MHz)
Size 0603 (Flip chip)
f (MHz)
POPULAR OPTIONS
For any option it is recommended to consult Vishay Sfernice for availability first.
Option: Enlarged terminations:
For stringent and special power dissipation requirements, the thermal resistance between the resistive layer and the solder joint
can be reduced using enlarged terminations chip resistors which are soldered on large and thick copper pads acting as heat sinks
(see application note: 53048 Power Dissipation in High Precision Vishay Sfernice Chip Resistors and Arrays (P Thin Film,
PRA Arrays, CHP Thick Film)
www.vishay.com/doc?53048.
Option to order: 0063 (applies to size 1206/1505/1020/2010/2512).
DIMENSIONS
(Option 0063) in millimeters
Bottom view for mounting
A
Uncoatted
ceramic
Enlarged
termination
B
F
D
E
A
CASE
SIZE
MAX. TOL.
+ 0.152
MIN. TOL.
- 0.152
NOMINAL
1206
1505
1020
2010
2512
3.06 (0.120)
3.81 (0.150)
2.54 (0.100)
5.08 (0.200)
6.35 (0.250)
B
MAX. TOL.
+ 0.127
MIN. TOL.
- 0.127
NOMINAL
1.60 (0.063)
1.32 (0.052)
5.08 (0.200)
2.54 (0.100)
3.06 (0.120)
E
MAX. TOL.
+ 0.13
MIN. TOL.
- 0.13
NOMINAL
0.40 (0.016)
D
MAX. TOL.
+ 0.13
MIN. TOL.
- 0.13
NOMINAL
1.22 (0.048)
1.59 (0.063)
NOMINAL
0.63 (0.024)
0.63 (0.024)
0.63 (0.024)
0.63 (0.024)
0.63 (0.024)
F
MIN.
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
MAX.
0.76 (0.030)
0.76 (0.030)
0.76 (0.030)
0.76 (0.030)
0.76 (0.030)
0.48 (0.019)
0.96 (0.038)
2.23 (0.088)
2.86 (0.11)
Document Number: 52023
Revision: 25-Aug-09
For technical questions, contact:
sfer@vishay.com
www.vishay.com
57
CHP, HCHP
Vishay Sfernice
High Stability Resistor Chips
(< 0.25 % at Pn at 70 °C during 1000 h)
Thick Film Technology
SUGGESTED LAND PATTERN
(Option 0063)
G
min.
X
max.
Z
max.
CHIP SIZE
1206
1505
1020
2010
2512
DIMENSIONS (in millimeters)
Z
max.
3.91 (0.154)
4.66 (0.183)
3.39 (0.133)
5.93 (0.233)
7.20 (0.283)
G
min.
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
0.50 (0.020)
X
max.
1.73 (0.068)
1.45 (0.057)
5.21 (0.205)
2.67 (0.105)
3.19 (0.126)
Option: High Temperature
For applications such as down hole drilling, high temperature withstanding is required. Vishay Sfernice offers an option
for utilization on extended temperature range: [- 55 °C; + 215 °C] powered (and up to 230 °C unpowered).
For guidance in designs, please refer to application note: 53047 Power Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays (P, PRA etc.) (High Temperature Application)
www.vishay.com/doc?53047.
Option to order 0131:
Please consult Vishay Sfernice
Parts have double and organic coating
External coating color: Blue
Marking: HT
Option: Marking
Option to order 0013:
Marking of ohmic value and tolerance:
Sizes: 0805 to 1005: 3 digits marking (according to EIA-96)
Sizes: 1206 to 2010: 4 digits marking (same codification than in the ordering procedure)
Tolerance indicated by a color dot.
Option to order 0014:
Marking of ohmic value:
Sizes 0805 to 1005: 3 digits marking (according to EIA-96)
Sizes 1206 to 2010: 4 digits marking (same codification than in the ordering procedure)
No standard marking available for smaller sizes.
A price adder will apply to the unit price of the parts for options 0013 and 0014.
PERFORMANCE
TESTS
Termination adhesion
Resistance to solder heat
Rapid temperature change
CONDITIONS
5N for 10 s
Immersion 10 s
in Sn/Pb 60/40
at + 260 °C
5 cycles
- 55 °C
+ 155 °C
Phase A dry heat
Phase B damp heat
Phase C cold - 55 °C
Phase D damp heat 5 cycles
56 days
6.25 Pn
for 2 s
1000 h at rated power
90’/30’ at + 70 °C
REQUIREMENTS
± (0.25 % + 0.05
Ω)
± (0.25 % + 0.05
Ω)
± (0.25 % + 0.05
Ω)
± (1 % + 0.05
Ω)
± (1 % + 0.05
Ω)
± (0.25 % + 0.05
Ω)
1000 h
± (1 % + 0.05
Ω)
1000 h
< 0.25 %
TYPICAL VALUES
AND DRIFTS
< ± 0.1 %
< ± 0.1 %
< ± 0.1 %
Climatic sequence
Humidity (steady state)
Short time overload
Load life
< ± 0.2 %
< ± 0.2 %
< ± 0.1 %
2000 h
< 0.5 %
10 000 h
<1%
www.vishay.com
58
For technical questions, contact:
sfer@vishay.com
Document Number: 52023
Revision: 25-Aug-09
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