首页 > 器件类别 > 半导体 > 逻辑

HCS21KMSR

HC/UH SERIES, DUAL 4-INPUT AND GATE, CDFP14

器件类别:半导体    逻辑   

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

下载文档
文档预览
HCS21MS
September 1995
Radiation Hardened
Dual 4-Input AND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
A1 1
B1 2
NC 3
C1 4
D1 5
Y1 6
GND 7
14 VCC
13 D2
12 C2
11 NC
10 B2
9 A2
8 Y2
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x
10
12
RAD
(Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
5µA at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
A1
B1
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
D2
C2
NC
B2
A2
Y2
Description
The Intersil HCS21MS is a Radiation Hardened Dual Input AND
Gate. A high on all inputs forces the output to a High state.
The HCS21MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS21MS is supplied in a 14 lead Ceramic flatpack (K suffix)
or a SBDIP Package (D suffix).
C1
D1
Y1
GND
Functional Diagram
An (1, 9)
Ordering Information
PART
NUMBER
HCS21DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
Bn (2, 10)
Yn (6, 8)
Cn (4, 12)
Dn (5, 13)
14 Lead SBDIP
TRUTH TABLE
HCS21KMSR
-55
o
C to +125
o
C
14 Lead Ceramic
Flatpack
An
14 Lead SBDIP
L
X
X
L
X
X
H
INPUTS
Bn
Cn
X
X
L
X
HX
Dn
X
X
X
L
H
OUTPUTS
Yn
L
L
L
L
H
HCS21D/
Sample
HCS21K/
Sample
HCS21HMSR
+25
o
C
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Die
X
X
+25
o
C
Die
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t
Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
53
518762
3052.1
Specifications HCS21MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
o
C/W
SBDIP Package. . . . . . . . . . . . . . . . . . . .
74
24
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 116
30
o
C/W
Maximum Package Power Dissipation at +125
o
C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC of VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
Output Voltage High
VOH
VCC = 4.5V, VIH = 3.15V,
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOH = -50µA, VIL = 1.65V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
4.8
4.0
-4.8
-4.0
-
MAX
10
200
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
-
µA
µA
-
Noise Immunity
Functional Test
FN
VCC = 4.5V,
VIH = 0.70(VCC), (Note 2)
VIL = 0.30(VCC)
7, 8A, 8B
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO
4.0V is recognized as a logic “1”, and VO
0.5V is recognized as a logic “0”.
Spec Number
54
518762
Specifications HCS21MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
MAX
18
20
20
22
UNITS
ns
ns
ns
ns
PARAMETER
Input to Y
SYMBOL
TPHL
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
Input to YN
TPHL
TPLH
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics..
TTHL
TTLH
VCC = 4.5V
1
1
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
-
-
MAX
39
44
10
10
15
22
UNITS
pF
pF
pF
pF
ns
ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
VCC = 4.5V
VCC = 4.5V
200K RAD LIMITS
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
4.0
-4.0
-
VCC
-0.1
-
-
2
2
MAX
0.2
-
-
0.1
-
±5
-
20
22
UNITS
mA
mA
mA
V
V
µA
-
ns
ns
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current (Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Noise Immunity
Functional Test
Input to Y
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
TPHL
TPLH
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests, VO
4.0V is recognized as a logic “1”, and VO
0.5V is recognized as a logic “0”.
Spec Number
55
518762
Specifications HCS21MS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
PARAMETER
ICC
IOL/IOH
DELTA LIMIT
3µA
-15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
Interim Test
I
(Postburn-In)
Interim Test
II
(Postburn-In)
PDA
Interim Test
III
(Postburn-In)
PDA
Final Test
Group A (Note 1)
Group B
Subgroup B-5
Subgroup B-6
Group D
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
Sample/5005
Sample/5005
GROUP A SUBGROUPS
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
1, 7, 9
Subgroups 1, 2, 3, 9, 10, 11
ICC, IOL/H
READ AND RECORD
ICC, IOL/H
ICC, IOL/H
ICC, IOL/H
NOTE: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
METHOD
5005
PRE RAD
1, 7, 9
POST RAD
Table 4
READ AND RECORD
PRE RAD
1, 9
POST RAD
Table 4 (Note 1)
Spec Number
56
518762
Specifications HCS21MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V
±
0.5V
VCC = 6V
±
0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1)
3, 6, 8, 11
1, 2, 4, 5, 7, 9, 10, 12,
13
-
14
-
-
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3, 6, 8, 11
7
-
1, 2, 4, 5, 9, 10, 12,
13, 14
-
-
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
7
3, 6, 8, 12
14
1, 2, 4, 5, 9, 10,
12, 13
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ
±
5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1KΩ
±
5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
3, 6, 8, 11
GROUND
7
VCC = 5V
±
0.5V
1, 2, 4, 5, 9, 10, 12, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ
±
5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
57
518762
查看更多>
参数对比
与HCS21KMSR相近的元器件有:HCS21D、HCS21DMSR、HCS21K、HCS21MS、HCS21HMSR。描述及对比如下:
型号 HCS21KMSR HCS21D HCS21DMSR HCS21K HCS21MS HCS21HMSR
描述 HC/UH SERIES, DUAL 4-INPUT AND GATE, CDFP14 HC/UH SERIES, DUAL 4-INPUT AND GATE, CDIP14 HC/UH SERIES, DUAL 4-INPUT AND GATE, CDIP14 HC/UH SERIES, DUAL 4-INPUT AND GATE, CDIP14 HC/UH SERIES, DUAL 4-INPUT AND GATE, CDIP14 HC/UH SERIES, DUAL 4-INPUT AND GATE, UUC14
热门器件
热门资源推荐
器件捷径:
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
需要登录后才可以下载。
登录取消