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HCTS299K/SAMPLE

HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP20

器件类别:逻辑    逻辑   

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

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器件参数
参数名称
属性值
Objectid
1515163646
零件包装代码
DFP
包装说明
DFP,
针数
20
Reach Compliance Code
unknown
YTEOL
0
计数方向
BIDIRECTIONAL
系列
HCT
JESD-30 代码
R-CDFP-F20
负载电容(CL)
50 pF
逻辑集成电路类型
PARALLEL IN PARALLEL OUT
最大频率@ Nom-Sup
16000000 Hz
位数
8
功能数量
1
端子数量
20
输出特性
3-STATE
输出极性
TRUE
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DFP
封装等效代码
FL20,.3
封装形状
RECTANGULAR
封装形式
FLATPACK
最大电源电流(ICC)
0.75 mA
传播延迟(tpd)
34 ns
认证状态
Not Qualified
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
端子形式
FLAT
端子节距
1.27 mm
端子位置
DUAL
总剂量
200k Rad(Si) V
触发器类型
POSITIVE EDGE
文档预览
DATASHEET
HCTS299MS
Radiation Hardened 8-Bit Universal Shift Register; Three-State
FN3069
Rev 1.00
August 1995
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii
5A at VOL, VOH
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
1
2
3
4
5
6
7
8
9
20 VCC
19 S1
18 DS7
17 Q7
16 I/O7
15 I/O5
14 I/O3
13 I/O1
12 CP
11 DS0
GND 10
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
Ordering Information
PART NUMBER
HCTS299DMSR
HCTS299KMSR
HCTS299D/Sample
HCTS299K/Sample
HCTS299HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
FN3069 Rev 1.00
August 1995
Page 1 of 12
DB NA
HCTS299MS
Functional Block Diagram
S1
20
19
DS7
18
STANDARD
OUTPUT
Q7
17
BUS LINE OUTPUTS
I/O7
16
I/O5
15
I/O3
14
I/O1
13
CP
12
DS0
11
VCC
OE
OE
OE
OE
OE
OE
OE
OE
D7
CL
CL
Q
D
R
Q7
S1
S0
S1
Q
D
D5
CL
R
Q5
CL
Q
D
D3
CL
R
Q3
CL
Q
D
D1
CL
R
Q1
MODE
SELECT
LOGIC
CL
CL
CL
S0
OE
Q6
Q4
Q2
Q0
OE
CL
CL
D6
R
D
Q
CL
CL
D4
R
D
Q
CL
CL
D2
R
D
Q
CL
CL
D0
R
D
Q
OE
OE
OE
OE
OE
OE
OE
OE
GND
1
S0
2
OE1
3
OE2
4
I/O6
5
I/O4
6
I/O2
7
I/O0
8
9
10
BUS LINE OUTPUTS
Q0
MR
STANDARD
OUTPUT
FN3069 Rev 1.00
August 1995
Page 2 of 12
HCTS299MS
TRUTH TABLE
Register Operating Modes
INPUTS
FUNCTION
Reset (Clear)
Shift Right
MR
L
H
H
Shift Left
H
H
Hold (Do Nothing)
Parallel Load
H
H
H
CP
X
S0
X
h
h
l
l
l
h
h
S1
X
l
l
h
h
l
h
h
DS0
X
l
h
X
X
X
X
X
DS7
X
X
X
l
h
X
X
X
I/On
X
X
X
X
X
X
l
h
Q0
L
L
H
q1
q1
q0
L
H
REGISTER OUTPUTS
Q1
L
q0
q0
q2
q2
q1
L
H
...
...
...
...
...
...
...
...
...
Q6
L
q5
q5
q7
q7
q6
L
H
Q7
L
q6
Q6
L
H
q7
L
H
TRUTH TABLE
Three-State I/O Port Operating Mode
INPUTS
FUNCTION
Read Register
OE1
L
L
L
L
Load Register
Disable I/O
X
H
X
OE2
L
L
L
L
X
X
H
S0
L
L
X
X
H
X
X
S1
X
X
L
L
H
X
X
Qn (REGISTER)
L
H
L
H
Qn = I/On
X
X
INPUTS/OUTPUTS
I/O0 . . . I/O7
L
H
L
H
I/On = Inputs
Z
Z
H = HighVoltage Level
L = Low Voltage Level
X = Immaterial
Z = Output in High Impedance State
h = Input Voltage High One Setup Time Prior Clock Transition
l = Input voltage Low One Setup Time Prior Clock Transition
= Low-to-High Clock Transition
qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition
FN3069 Rev 1.00
August 1995
Page 3 of 12
HCTS299MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
 10mA
DC Drain Current, Any One Output
25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
JA
JC
o
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72 C/W
24
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 107
28
o
C/W
o
C Ambient
Maximum Package Power Dissipation at +125
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
VCC = 4.5V, VIH = 2.25V,
IOL = 50A, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50A, VIL = 0.8V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50A, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50A, VIL = 0.8V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
7.2
6.0
-7.2
-6.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
A
A
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
-
0.1
V
1, 2, 3
VCC
-0.1
VCC
-0.1
-
-
-
-
-
-
V
1, 2, 3
-
V
1
2, 3
0.5
5.0
1
50
-
A
A
A
A
-
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or
VCC, VCC = 5.5V
1
2, 3
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages referenced to device GND.
2. For functional tests, VO
4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
FN3069 Rev 1.00
August 1995
Page 4 of 12
HCTS299MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
CLK to Q0, Q7
TPHL,
TPLH
VCC = 4.5V
9
10, 11
MR to Output
TPHL
VCC = 4.5V
9
10, 11
OEn to Output
TPZH
VCC = 4.5V
9
10, 11
TPHZ
9
10, 11
TPZL
9
10, 11
TPLZ
9
10, 11
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MAX
28
32
30
34
32
36
23
25
25
27
30
34
30
34
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
CLK to I/On
SYMBOL
TPHL,
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
TTHL,
TTLH
VCC = 4.5V
1
1
Max Operating
Frequency
FMAX
VCC = 4.5V
1
1
Setup Time DS0,
DS7, I/On to CLK
TSU
VCC = 4.5V
1
1
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
-
-
-
-
20
30
MAX
147
171
10
10
15
22
25
16
-
-
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
FN3069 Rev 1.00
August 1995
Page 5 of 12
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