HCTS646MS
August 1995
Radiation Hardened
Octal Bus Transceiver/Register, Three-State
Pinouts
24 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
CAB 1
SAB 2
DIR 3
A0 4
A1 5
A2 6
A3 7
A4 8
A5 9
A6 10
A7 11
GND 12
24 VCC
23 CBA
22 SBA
21 OE
20 B0
19 B1
18 B2
17 B3
16 B4
15 B5
14 B6
13 B7
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Cosmic Ray Upset Rate 2 x 10
-9
Errors/Bit Day
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2
Input Current Levels Ii
≤
5µA at VOL, VOH
•
Description
The Intersil HCTS646MS is a Radiation Hardened Three-
State Octal Bus Tranceiver/Register with Non-Inverting
outputs. This device is a bus transceiver with D-type flip-flops
which act as internal storage registers. Data on the A bus or
the B bus can be clocked into the registers on a High-to-Low
transition of either CAB ro CBA clock inputs. Output enable
(OE) and Direction (DIR) inputs control the transceiver func-
tions. Data present at the high impedance output can be
stored in either register or both but only one of the two buses
can be enabled as outputs at any one time. The select con-
trols (SAB and SBA) can multiplex stored and transparent
(real time) data. The direction control determines which data
bus will receive data when the OE pin is LOW. In the high
impedance mode (OE high), A data can be stored in one reg-
ister and B data in the other register. Data at the A or B termi-
nals can be clocked into the storage flip-flops at any time.
The HCTS646MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS646MS is supplied in a 24 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
24 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
CAB
SAB
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
CBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
Ordering Information
PART NUMBER
HCTS646DMSR
HCTS646KMSR
HCTS646D/Sample
HCTS646K/Sample
HCTS646HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
24 Lead SBDIP
24 Lead Ceramic Flatpack
24 Lead SBDIP
24 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
Spec Number
File Number
706
518628
3074.1
HCTS646MS
Functional Diagram
CL
FF
Q
O
O
FF
Q
CL
4
PAD
A0
P
P
20
PAD
N
N
B0
22
PAD
SBA
2
PAD
SAB
23
PAD
CBA
TO CHANNELS
1 THROUGH 7
1
PAD
CAB
21
PAD
OE
3
PAD
DIR
CHANNEL
0
1
2
3
4
5
6
7
PINS
4 - 20
5 - 19
6 - 18
7 - 17
8 - 16
9 - 15
10 - 14
11 - 13
3
PAD
DIR
12
PAD
VSS
TRUTH TABLE
INPUTS
OE
X
X
H
H
L
L
L
L
DIR
X
X
X
X
L
L
H
H
H or L
X
X
X
H or L
H or L
X
H or L
X
X
X
CAB
CBA
X
SAB
X
X
X
X
X
X
L
H
SBA
X
X
X
X
L
H
X
X
DATA I/O*
A0 THRU A7
Input Not
Specified
Input Not
Specified
Input
Input
Output
Output
Input
Input
B0 THRU B7
Not Specified
Input
Input
Input
Input
Input
Input
Output
Output
OPERATION OR FUNCTION
Store A, B Unspecified
Store B, A Unspecified
Store A and B Data
Isolation, Hold Storage
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Spec Number
707
518628
Specifications HCTS646MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
o
C/W
SBDIP Package. . . . . . . . . . . . . . . . . . . .
65
25
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . .
89
24
o
C/W
Maximum Package Power Dissipation at +125
o
C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.77W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.56W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.4mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . 11.2mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .500ns Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
7.2
6.0
-7.2
-6.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
±1
±50
-
µA
µA
µA
µA
-
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or
VCC, VCC = 5.5V
1
2, 3
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages referenced to device GND.
2. For functional tests, VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
708
518628
Specifications HCTS646MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MAX
31
36
32
37
24
27
24
27
30
34
28
31
28
31
28
34
30
36
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
A Data to B Bus
(Store)
B Data to A Bus
(Store)
A Data to B Bus
SYMBOL
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLZ,
TPHZ
TPLZ,
TPHZ
TPZL,
TPZH
TPZL,
TPZH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
B Data to A Bus
Select to Data
DIR to Output
Enable to Output
DIR to Output
Enable to Output
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
Max Operating
Frequency
Setup Time Data to
Clock
Hold Time Data to
Clock
Pulse Width Clocks
TTHL,
TTLH
FMAX
VCC = 4.5V
1
1
VCC = 4.5V
1
1
TSU
VCC = 4.5V
1
1
TH
VCC = 4.5V
1
1
TW
VCC = 4.5V
1
1
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TEMPERATURE
+25
o
C
+125
o
C,
-55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25 C
+125
o
C,
-55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
o
MIN
-
-
-
-
-
-
-
-
12
18
5
5
25
38
MAX
54
123
10
10
12
18
25
17
-
-
-
-
-
-
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
Spec Number
709
518628
Specifications HCTS646MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
6.0
-6.0
-
VCC
-0.1
-
-
-
2
2
2
2
2
2
2
2
2
MAX
0.75
-
-
0.1
-
±5
±50
-
36
37
27
27
34
31
31
34
36
UNITS
mA
mA
mA
V
V
µA
µA
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
A Data to B Bus (Store)
B Data to A Bus (Store)
A Data to B Bus
B Data to A Bus
Select to Data
DIR to Output
Enable to Output
DIR to Output
Enable to Output
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
IOZ
FN
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLH,
TPHL
TPLZ,
TPHZ
TPLZ,
TPHZ
TPZL,
TPZH
TPZL,
TPZH
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V or 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
VCC = 4.5V or 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
VCC = 5.5V, VIN = VCC or GND
Applied Voltage = 0V or VCC, VCC = 5.5V
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
5
PARAMETER
ICC
IOL/IOH
IOZL/IOZH
DELTA LIMIT
12µA
-15% of 0 Hour
±200nA
Spec Number
710
518628
FPGA/CPLD
