H8/3714 Series
HD6433712
HD6433713
HD6433714, HD6473714
Hardware Manual
Preface
The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,
with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is
compatible with the H8/300 CPU, and is ideal for realtime control.
The H8/3714 Series has a system-on-a-chip architecture that includes such peripheral functions as
a vacuum fluorescent display controller/driver, five timers, a 14-bit PWM, a two-channel serial
communication interface, and an A/D converter. It also has high-voltage pins capable of directly
driving a vacuum fluorescent display, making it ideal for use in systems employing this type of
display.
This manual describes the hardware of the H8/3714 Series. For details on the instruction set, refer
to the H8/300L Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
.........................................................................................................
Overview.........................................................................................................................
Internal Block Diagram ..................................................................................................
Pin Arrangement and Functions .....................................................................................
1.3.1 Pin Arrangement.................................................................................................
1.3.2 Pin Functions ......................................................................................................
1
1
5
6
6
8
Section 2
2.1
CPU
................................................................................................................... 15
15
15
16
17
18
18
18
20
20
21
22
23
23
25
29
31
33
34
34
36
40
42
43
45
45
46
46
46
47
47
48
2.2
2.3
2.4
2.5
2.6
2.7
Overview.........................................................................................................................
2.1.1 Features...............................................................................................................
2.1.2 Address Space.....................................................................................................
2.1.3 Register Configuration........................................................................................
Register Descriptions......................................................................................................
2.2.1 General Registers................................................................................................
2.2.2 Control Registers ................................................................................................
2.2.3 Initial Register Values.........................................................................................
Data Formats...................................................................................................................
2.3.1 Data Formats in General Registers .....................................................................
2.3.2 Memory Data Formats........................................................................................
Addressing Modes ..........................................................................................................
2.4.1 Addressing Modes ..............................................................................................
2.4.2 Effective Address Calculation ............................................................................
Instruction Set.................................................................................................................
2.5.1 Data Transfer Instructions ..................................................................................
2.5.2 Arithmetic Operations ........................................................................................
2.5.3 Logic Operations ................................................................................................
2.5.4 Shift Operations ..................................................................................................
2.5.5 Bit Manipulations ...............................................................................................
2.5.6 Branching Instructions........................................................................................
2.5.7 System Control Instructions ...............................................................................
2.5.8 Block Data Transfer Instruction .........................................................................
CPU States ......................................................................................................................
2.6.1 Overview.............................................................................................................
2.6.2 Program Execution State ....................................................................................
2.6.3 Program Halt State..............................................................................................
2.6.4 Exception-Handling State...................................................................................
Basic Operation Timing..................................................................................................
2.7.1 Access to On-Chip Memory (RAM, ROM) .......................................................
2.7.2 Access to On-Chip Peripheral Modules .............................................................
2.8
Application Notes ........................................................................................................... 49
2.8.1 Notes on Data Access ......................................................................................... 49
2.8.2 Notes on Bit Manipulation.................................................................................. 51
Section 3
3.1
3.2
System Control
.............................................................................................. 55
55
55
55
56
58
66
67
67
72
72
73
74
75
76
76
82
83
83
85
3.3
3.4
Overview.........................................................................................................................
Exception Handling ........................................................................................................
3.2.1 Reset ...................................................................................................................
3.2.2 Interrupts.............................................................................................................
3.2.3 Interrupt Control Registers .................................................................................
3.2.4 External Interrupts ..............................................................................................
3.2.5 Internal Interrupts ...............................................................................................
3.2.6 Interrupt Operations............................................................................................
3.2.7 Return from an Interrupt.....................................................................................
3.2.8 Interrupt Response Time.....................................................................................
3.2.9 Valid Interrupts in Each Mode............................................................................
3.2.10 Notes on Stack Area Use ....................................................................................
System Modes.................................................................................................................
3.3.1 Active Mode .......................................................................................................
3.3.2 Low-Power Operation Mode ..............................................................................
3.3.3 Application Notes ...............................................................................................
System Control Registers ...............................................................................................
3.4.1 System Control Register 1 (SYSCR1)................................................................
3.4.2 System Control Register 2 (SYSCR2)................................................................
Section 4
4.1
4.2
ROM
................................................................................................................. 87
87
87
88
88
88
91
91
94
96
4.3
Overview.........................................................................................................................
4.1.1 Block Diagram....................................................................................................
PROM Mode...................................................................................................................
4.2.1 Selection to PROM Mode...................................................................................
4.2.2 Socket Adapter Pin Arrangement and Memory Map .........................................
Programming ..................................................................................................................
4.3.1 Writing and Verifying .........................................................................................
4.3.2 Programming Precautions...................................................................................
4.3.3 Reliability of Written Data .................................................................................
Section 5
5.1
RAM
................................................................................................................. 97
Overview......................................................................................................................... 97
5.1.1 Block Diagram.................................................................................................... 97
5.1.2 Display RAM Area ............................................................................................. 97
Section 6
6.1
6.2
6.3
Clock Pulse Generators
............................................................................... 99
99
99
100
103
Overview.........................................................................................................................
6.1.1 Block Diagram....................................................................................................
System Clock Generator .................................................................................................
Subclock Generator ........................................................................................................
Section 7
7.1
I/O Ports
........................................................................................................... 105
7.2
7.3
7.4
7.5
7.6
7.7
Overview......................................................................................................................... 105
7.1.1 Port Types and Mask Options............................................................................. 107
7.1.2 MOS Pull-Up ...................................................................................................... 108
7.1.3 MOS Pull-Down ................................................................................................. 110
Port 0 ............................................................................................................................ 111
7.2.1 Overview............................................................................................................. 111
7.2.2 Register Configuration and Description ............................................................. 111
7.2.3 Pin Functions ...................................................................................................... 112
7.2.4 Pin States ............................................................................................................ 112
Port 1 ............................................................................................................................ 113
7.3.1 Overview............................................................................................................. 113
7.3.2 Register Configuration and Description ............................................................. 113
7.3.3 Pin Functions ...................................................................................................... 118
7.3.4 Pin States ............................................................................................................ 119
Port 4 ............................................................................................................................ 120
7.4.1 Overview............................................................................................................. 120
7.4.2 Register Configuration and Description ............................................................. 120
7.4.3 Pin Functions ...................................................................................................... 121
7.4.4 Pin States ............................................................................................................ 121
Port 5 ............................................................................................................................ 122
7.5.1 Overview............................................................................................................. 122
7.5.2 Register Configuration and Description ............................................................. 122
7.5.3 Pin Functions ...................................................................................................... 123
7.5.4 Pin States ............................................................................................................ 123
Port 6 ............................................................................................................................ 124
7.6.1 Overview............................................................................................................. 124
7.6.2 Register Configuration and Description ............................................................. 124
7.6.3 Pin Functions ...................................................................................................... 125
7.6.4 Pin States ............................................................................................................ 125
Port 7 ............................................................................................................................ 126
7.7.1 Overview............................................................................................................. 126
7.7.2 Register Configuration and Description ............................................................. 126
7.7.3 Pin Functions ...................................................................................................... 127
7.7.4 Pin States ............................................................................................................ 127
