OMC932723300
H8/3814U Series
H8/3814U
HD6433814U
H8/3813U
HD6433813U
H8/3812U
HD6433812U
Hardware Manual
Preface
The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,
with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is
compatible with the H8/300 CPU.
The H8/3814U Series has a system-on-a-chip architecture that includes such peripheral functions
as an LCD controller/driver, three types of timers, a two-channel serial communication interface,
and an A/D converter. This makes it ideal for use in systems requiring an LCD display.
This manual describes the hardware of the H8/3814U Series. For details on the H8/3814U Series
instruction set, refer to the H8/300L Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
.........................................................................................................
Overview.........................................................................................................................
Internal Block Diagram ..................................................................................................
Pin Arrangement and Functions .....................................................................................
1.3.1 Pin Arrangement.................................................................................................
1.3.2 Pin Functions ......................................................................................................
1
1
5
6
6
8
Section 2
2.1
CPU
................................................................................................................... 13
13
13
14
14
15
15
15
17
17
18
19
20
20
22
26
28
30
31
31
33
37
39
40
42
42
43
45
45
46
46
46
2.2
2.3
2.4
2.5
2.6
2.7
Overview.........................................................................................................................
2.1.1 Features...............................................................................................................
2.1.2 Address Space.....................................................................................................
2.1.3 Register Configuration........................................................................................
Register Descriptions......................................................................................................
2.2.1 General Registers................................................................................................
2.2.2 Control Registers ................................................................................................
2.2.3 Initial Register Values.........................................................................................
Data Formats...................................................................................................................
2.3.1 Data Formats in General Registers .....................................................................
2.3.2 Memory Data Formats........................................................................................
Addressing Modes ..........................................................................................................
2.4.1 Addressing Modes ..............................................................................................
2.4.2 Effective Address Calculation ............................................................................
Instruction Set.................................................................................................................
2.5.1 Data Transfer Instructions ..................................................................................
2.5.2 Arithmetic Operations ........................................................................................
2.5.3 Logic Operations ................................................................................................
2.5.4 Shift Operations ..................................................................................................
2.5.5 Bit Manipulations ...............................................................................................
2.5.6 Branching Instructions........................................................................................
2.5.7 System Control Instructions ...............................................................................
2.5.8 Block Data Transfer Instruction .........................................................................
Basic Operational Timing...............................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .......................................................
2.6.2 Access to On-Chip Peripheral Modules .............................................................
CPU States ......................................................................................................................
2.7.1 Overview.............................................................................................................
2.7.2 Program Execution State ...................................................................................
2.7.3 Program Halt State..............................................................................................
2.7.4 Exception-Handling State...................................................................................
2.8
2.9
Memory Map ..................................................................................................................
2.8.1 Memory Map ......................................................................................................
2.8.2 LCD RAM Address Relocation..........................................................................
Application Notes ...........................................................................................................
2.9.1 Notes on Data Access .........................................................................................
2.9.2 Notes on Bit Manipulation..................................................................................
2.9.3 Notes on Use of the EEPMOV Instruction.........................................................
47
47
48
49
49
51
57
Section 3
3.1
3.2
Exception Handling
...................................................................................... 59
59
59
59
59
61
62
62
64
72
73
74
79
80
80
81
3.3
3.4
Overview.........................................................................................................................
Reset ............................................................................................................................
3.2.1 Overview.............................................................................................................
3.2.2 Reset Sequence ...................................................................................................
3.2.3 Interrupt Immediately after Reset.......................................................................
Interrupts.........................................................................................................................
3.3.1 Overview.............................................................................................................
3.3.2 Interrupt Control Registers .................................................................................
3.3.3 External Interrupts ..............................................................................................
3.3.4 Internal Interrupts ...............................................................................................
3.3.5 Interrupt Operations............................................................................................
3.3.6 Interrupt Response Time.....................................................................................
Application Notes ...........................................................................................................
3.4.1 Notes on Stack Area Use ....................................................................................
3.4.2 Notes on Rewriting Port Mode Registers ...........................................................
Section 4
4.1
Clock Pulse Generators
............................................................................... 83
83
83
83
84
87
90
91
4.2
4.3
4.4
4.5
Overview.........................................................................................................................
4.1.1 Block Diagram....................................................................................................
4.1.2 System Clock and Subclock ...............................................................................
System Clock Generator .................................................................................................
Subclock Generator ........................................................................................................
Prescalers ........................................................................................................................
Note on Oscillators .........................................................................................................
Section 5
5.1
5.2
Power-Down Modes
..................................................................................... 93
5.3
Overview......................................................................................................................... 93
5.1.1 System Control Registers ................................................................................... 96
Sleep Mode ..................................................................................................................... 99
5.2.1 Transition to Sleep Mode.................................................................................... 99
5.2.2 Clearing Sleep Mode .......................................................................................... 99
Standby Mode................................................................................................................. 100
5.4
5.5
5.6
5.7
5.8
5.3.1 Transition to Standby Mode ............................................................................... 100
5.3.2 Clearing Standby Mode ...................................................................................... 100
5.3.3 Oscillator Settling Time after Standby Mode is Cleared .................................... 100
5.3.4 Transition to Standby Mode and Port Pin States ................................................ 101
Watch Mode.................................................................................................................... 102
5.4.1 Transition to Watch Mode .................................................................................. 102
5.4.2 Clearing Watch Mode ......................................................................................... 102
5.4.3 Oscillator Settling Time after Watch Mode is Cleared ....................................... 102
Subsleep Mode................................................................................................................ 103
5.5.1 Transition to Subsleep Mode .............................................................................. 103
5.5.2 Clearing Subsleep Mode..................................................................................... 103
Subactive Mode .............................................................................................................. 104
5.6.1 Transition to Subactive Mode............................................................................. 104
5.6.2 Clearing Subactive Mode ................................................................................... 104
5.6.3 Operating Frequency in Subactive Mode ........................................................... 104
Active (medium-speed) Mode ........................................................................................ 105
5.7.1 Transition to Active (medium-speed) Mode....................................................... 105
5.7.2 Clearing Active (medium-speed) Mode ............................................................. 105
5.7.3 Operating Frequency in Active (medium-speed) Mode ..................................... 105
Direct Transfer ................................................................................................................ 106
5.8.1 Direct Transfer Overview ................................................................................... 106
5.8.2 Calculation of Direct Transfer Time before Transition ...................................... 107
Section 6
6.1
ROM
................................................................................................................. 111
Overview......................................................................................................................... 111
6.1.1 Block Diagram.................................................................................................... 111
Section 7
7.1
RAM
................................................................................................................. 113
Overview......................................................................................................................... 113
7.1.1 Block Diagram.................................................................................................... 113
Section 8
I/O Ports
........................................................................................................... 115
8.1 Overview ............................................................................................................................ 115
8.2
Port 1 ............................................................................................................................ 117
8.2.1 Overview............................................................................................................. 117
8.2.2 Register Configuration and Description ............................................................. 117
8.2.3 Pin Functions ...................................................................................................... 121
8.2.4 Pin States ............................................................................................................ 123
8.2.5 MOS Input Pull-Up............................................................................................. 123
8.3
Port 2 ............................................................................................................................ 124
8.3.1 Overview............................................................................................................. 124
