HD74LVC533
Octal D-type Transparent Latches with 3-state Outputs
REJ03D0356–0400Z
(Previous ADE-205-070B (Z))
Rev.4.00
Jul. 27, 2004
Description
The HD74LVC533 has eight D type latches with three state outputs in a 20 pin package. When the latch enable input is
high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at
the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all
outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note type personal
computer) and low power consumption extends the life of a battery for long time operation.
Features
•
•
•
•
•
•
V
CC
= 2.0 V to 5.5 V
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±24 mA (@V
CC
= 3.0 V to 5.5 V)
Ordering Information
Package Type
SOP–20 pin (JEITA)
TSSOP–20 pin
Package Code
FP–20DAV
TTP–20DAV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LVC533FPEL
HD74LVC533TELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
G
H
L
L
L
H:
L:
X:
Z:
Q
0
:
LE
X
H
H
L
D
X
L
H
X
Output
Q
Z
H
L
Q
0
High level
Low level
Immaterial
High impedance
Level of
Q
before the indicated steady input conditions were established.
Rev.4.00 Jul. 27, 2004 page 1 of 7
HD74LVC533
Pin Arrangement
G 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
G Q
D
G Q
D
20 V
CC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 LE
D
G Q
D
G Q
G Q
D
G Q
D
D
G Q
D
G Q
(Top view)
Absolute Maximum Ratings
Item
Supply voltage
Input diode current
Input voltage
Output diode current
Output voltage
Output current
V
CC
, GND current / pin
Storage temperature
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
or I
GND
Tstg
Ratings
–0.5 to 6.0
–50
–0.5 to 6.0
–50
50
–0.5 to V
CC
+0.5
±50
100
–65 to +150
Unit
V
mA
V
mA
V
mA
mA
°C
Conditions
V
I
= –0.5 V
V
O
= –0.5 V
V
O
= V
CC
+0.5 V
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.4.00 Jul. 27, 2004 page 2 of 7
HD74LVC533
Recommended Operating Conditions
Item
Supply voltage
Input / output voltage
Operating temperature
Output current
Symbol
V
CC
V
I
V
O
Ta
I
OH
I
OL
Input rise / fall time
*1
t
r
, t
f
Ratings
1.5 to 5.5
2.0 to 5.5
0 to 5.5
0 to V
CC
–40 to 85
–12
–24
*2
12
24
*2
10
Unit
V
V
V
°C
mA
mA
ns/V
Conditions
Data retention
At operation
G,
LE, D
Q
V
CC
= 2.7 V
V
CC
= 3.0 V to 5.5 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 5.5 V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
2. Duty cycle
≤
50%
Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol V
CC
(V)
V
IH
V
IL
Output voltage
V
OH
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 5.5
2.7
3.0
3.0
4.5
2.7 to 5.5
2.7
3.0
4.5
0 to 5.5
5.5
5.5
3.0 to 3.6
Min
2.0
V
CC
×0.7
—
—
V
CC
–0.2
2.2
2.4
2.0
3.8
—
—
—
—
—
—
—
—
Max
—
—
0.8
V
CC
×0.3
—
—
—
—
—
0.2
0.4
0.55
0.55
±5.0
±10
20
500
Unit
V
V
V
I
OH
= –100
µA
I
OH
= –12 mA
I
OH
= –24 mA
V
I
OL
= 100
µA
I
OL
= 12 mA
I
OL
= 24 mA
V
IN
= 5.5 V or GND
V
IN
= V
CC
, GND
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= one input at(V
CC
–0.6)V,
other inputs at V
CC
or GND
Test Conditions
V
OL
Input current
Off state output current
Quiescent supply current
I
IN
I
OZ
I
CC
∆I
CC
µA
µA
µA
µA
Rev.4.00 Jul. 27, 2004 page 3 of 7
HD74LVC533
Switching Characteristics
Ta = –40 to 85°C
Item
Propagation delay time
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
Output enable time
t
ZH
t
ZL
t
HZ
t
LZ
t
su
V
CC
(V)
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
2.7
Min
—
1.5
—
—
1.5
—
—
1.5
—
—
1.5
—
2.0
2.0
2.0
2.0
2.0
2.0
4.0
4.0
4.0
—
—
Typ
7.0
5.0
4.0
7.5
5.5
4.0
7.5
5.5
4.0
5.0
4.5
3.5
—
—
—
—
—
—
—
—
—
3.0
15.0
Max
9.0
8.0
6.5
10.5
9.5
8.0
9.5
8.5
7.0
8.5
7.5
6.5
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
From
(Input)
D
To
(Output)
Q
ns
LE
Q
ns
G
Q
Output disable time
ns
G
Q
Setup time
ns
Hold time
t
h
ns
Pulse width
t
w
ns
Input capacitance
Output capacitance
C
IN
C
O
pF
pF
Test Circuit
V
CC
V
CC
Output
G
Input
1Q to 8Q
C
L
=
50 pF
1D to 8D
Symbol
t
PLH
/ t
PHL
LE
t
su
/ t
h
/ t
w
t
ZH
/ t
HZ
t
ZL
/ t
LZ
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
500
Ω
S1
450
Ω
50
Ω
Scope
OPEN
*1
See under table
See Function Table
GND
Pulse Generator
Z
out
= 50
Ω
Input
Pulse Generator
Z
out
= 50
Ω
OPEN
GND
6V
OPEN
GND
2×Vcc
Note:
1. C
L
includes probe and jig capacitance.
Rev.4.00 Jul. 27, 2004 page 4 of 7
HD74LVC533
Waveforms – 1
t
r
Input LE
10 %
t
r
Input D
90 %
10 %
t
PHL
V
ref
90 % 90 %
V
ref
10 %
t
f
90 %
10 %
t
PLH
V
ref
V
OL
t
f
V
IH
V
ref
GND
V
IH
GND
V
OH
Output Q
Waveforms – 2
t
r
Input LE
90 %
10 %
t
r
90 %
Input D
V
ref
10 %
t
PHL
V
ref
90 %
V
ref
10 %
t
PLH
V
ref
V
OL
t
f
V
IH
GND
V
IH
GND
V
OH
Output Q
Waveforms – 3
t
r
Input LE
10 %
90 % 90 %
V
ref
V
ref
t
w
t
su
10 %
t
h
V
IH
Input D
V
ref
V
ref
GND
t
f
V
IH
GND
Notes:
1. t
r
= 2.5 ns, t
f
= 2.5 ns
2. Input waveform : PRR = 10 MHz, duty cycle 50%
Rev.4.00 Jul. 27, 2004 page 5 of 7
