HM62V8256BI Series
2 M SRAM (256-kword
×
8-bit)
ADE-203-1004 (Z)
Preliminary, Rev. 0.0
Jan. 19, 1999
Description
The Hitachi HM62V8256BI Series is 2-Mbit static RAM organized 262,144-kword
×
8-bit.
HM62V8256BI Series has realized higher density, higher performance and low power consumption by
employing Hi-CMOS process technology. The HM62V8256BI Series offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It is packaged in standard 32-pin plastic
TSOPI.
Features
•
Single 3.0 V supply: 2.7 V to 3.6 V
•
Access time: 85 ns/100 ns (max)
•
Power dissipation
Active: 15 mW/MHz (typ)
Standby: 2.4
µW
(typ)
•
Completely static memory.
No clock or timing strobe required
•
Equal access and cycle times
•
Common data input and output
Three state output
•
Directly LV-TTL compatible all inputs
•
Battery backup operation
2 chip selection for battery backup
•
Temperature range: –40 to +85°C
HM62V8256BI Series
Ordering Information
Type No.
HM62V8256BLTSI-8
HM62V8256BLTSI-10
Access time
85 ns
100 ns
Package
8
×
13.4 mm 32-pin plastic TSOP I (TFP-32DC)
HM62V8256BLTSI-8SL
85 ns
HM62V8256BLTSI-10SL 100 ns
HM62V8256BLTSI-8UL 85 ns
HM62V8256BLTSI-10UL 100 ns
2
HM62V8256BI Series
Pin Arrangement
32-pin TSOP (Normal Type TSOP)
A11
A9
A8
A13
WE
CS2
A15
V
CC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
V
SS
I/O2
I/O1
I/O0
A0
A1
A2
A3
(Top view)
Pin Description
Pin name
A0 to A17
I/O0 to I/O7
CS1
CS2
WE
OE
V
CC
V
SS
NC
Function
Address input
Data input/output
Chip select 1
Chip select 2
Write enable
Output enable
Power supply
Ground
No connection
3
HM62V8256BI Series
Block Diagram
LSB
A12
A7
A6
A5
A4
A3
A2
A1
A0
A10
MSB
•
•
•
•
•
V
CC
V
SS
Row
decoder
Memory matrix
512 x 4,096
I/O0
Input
data
control
I/O7
•
•
Column I/O
Column decoder
•
•
LSB
MSB
A14A16A15 A13 A8 A9 A11 A17
•
•
CS1
CS2
WE
OE
Timing pulse generator
Read/Write control
4
HM62V8256BI Series
Operation Table
CS1
H
L
L
L
L
L
L
CS2
H
L
L
H
H
H
H
WE
×
×
×
H
L
L
H
OE
×
×
×
L
H
L
H
I/O
High-Z
High-Z
High-Z
Dout
Din
Din
High-Z
Operation
Standby
Standby
Standby
Read
Write
Write
Output disable
Note: H: V
IH
, L: V
IL
,
×:
V
IH
or V
IL
Absolute Maximum Ratings
Parameter
Power supply voltage relative to V
SS
Terminal voltage on any pin relative to V
SS
Power dissipation
Storage temperature range
Storage temperature range under bias
Symbol
V
CC
V
T
P
T
Tstg
Tbias
Value
–0.5 to +4.6
–0.5*
1
to V
CC
+ 0.3*
2
1.0
–55 to +125
–40 to +85
Unit
V
V
W
°C
°C
Notes: 1. V
T
min: –1.5 V for pulse half-width
≤
30 ns
2. Maximum voltage is +4.6 V
DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input high voltage
Input low voltage
Ambient temperature range
Note:
V
IH
V
IL
Ta
Min
2.7
0
2.4
–0.3
–40
Typ
3.0
0
—
—
—
Max
3.6
0
V
CC
+ 0.3
0.4
+85
Unit
V
V
V
V
°C
1
Note
1. V
IL
min: –1.5 V for pulse half-width
≤
30 ns
5
51单片机
