HANBit
HMF3M32M6V
FLASH-ROM MODULE 12MByte (3M x 32-Bit) ,72pin-SIMM, 3.3V
Part No. HMF3M32M6V
GENERAL DESCRIPTION
The HMF3M32M6VA is a high-speed flash read only memory (FROM) module containing 6,291,456 words organized in a
x32bit configuration. The module consists of six 1M x 16 FROM mounted on a 72-pin, single-sided, FR4-printed circuit board.
Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the
device is similar to reading from other flash or EPROM devices.
Output enable (/OE) and write enable (/WE) can set the memory input and output.
When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power
design. All module components may be powered from a single +3.0V DC power supply.
FEATURES
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Access time : 70,80, 90 and 120ns
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High-density 12MByte design
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High-reliability, low-power design
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Single + 3V
±
0.3V power supply
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Easy memory expansion
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Hardware reset pin(RESET#)
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FR4-PCB design
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Low profile 72-pin SIMM
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Minimum 1,000,000 write/erase cycle
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Flexible sector architecture
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Embedded algorithms
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Erase suspend / Erase resume
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
-70
-80
-90
-120
20
21
22
23
24
Vss
PIN ASSIGNMENT
SYMBOL
/RESET
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
Vcc
DQ7
/CE_1L
/CE_2L
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC
/CE_3H
DQ16
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
DQ17
DQ18
DQ19
DQ20
DQ21
Vcc
DQ22
DQ23
/CE_1H
/CE_2H
DQ24
DQ25
DQ26
DQ27
Vss
DQ28
DQ29
DQ30
DQ31
NC
NC
/CE_3L
A19
/OE
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
/WE
A18
A17
A16
A15
A14
A13
A12
A11
A10
Vcc
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
NC
NC
Vss
OPTIONS
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Timing
70ns access
80ns access
90ns access
120ns access
MARKING
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Packages
72-pin SIMM
M
72-PIN SIMM
TOP VIEW
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REV.02(August,2002)
1
HANbit Electronics Co., Ltd.
HANBit
FUNCTIONAL BLOCK DIAGRAM
HMF3M32M6V
DQ0 - DQ31
A0
–
A19
/WE
/CE_1L
32
20
A0-19
DQ 0-15
/WE
/OE
/CE
RY-BY
/Reset
A0-19
DQ16-31
/WE
/OE
RY-BY
/Reset
DQ16-31
U1
U3
/CE
/CE_1H
A0-19
DQ 0-15
/WE
/CE_2L
/WE
/OE
/CE
RY-BY
/Reset
A0-19
DQ 16-31
/WE
/OE
RY-BY
/Reset
DQ16-31
U2
U4
/CE
/CE_2H
A0-19
/WE
/OE
/CE_3L
/RY_BY
/Reset
DQ0-15
/WE
/OE
/CE
RY-BY
/Reset
A0-19
DQ16-31
/WE
/OE
RY-BY
/Reset
DQ 16-31
U5
U6
/CE
/CE_3H
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REV.02(August,2002)
2
HANbit Electronics Co., Ltd.
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ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
HMF3M32M6V
RATING
-0.5V to +4.0V
-0.5V to +4.0V
6W
-65oC to +150 oC
Operating Temperature
T
A
-55oC to +125 oC
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Stresses greater than those listed under " Absolute Maximum Ratings" may cause perman ent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
2.7V
0
2.0
-0.5
TYP.
3.0V
0
-
-
MAX
3.6V
0
Vcc+0.3V
0.8V
DC CHARACTERISTICS (CMOS Compatible)
PARAMET
DESCRIPTION
ER
I
LI
I
LIT
I
LO
Input Load Current
A9 Input Load Current
Output Leakage Current
V
IN
=Vss to Vcc, Vcc=Vcc max
Vcc= Vcc max ; A9=12.5V
V
OUT
= Vss to Vcc, Vcc= Vcc max
/CE=V
IK
, /OE=V
IH
Vcc Active Read Current
I
CC1
(Note1)
/CE=V
IL
, /OE=V
IH
Word Mode
Vcc Active Write Current
I
CC2
(Note 2 and 4)
I
CC3
I
CC4
During Reset
Automatic Sleep
I
CC5
Mode(Note3)
V
IL
V
IH
Input Low Voltage
Input High Voltage
V
IL
=Vss±0.3V
-0.5
0.7xVcc
0.8
Vcc+0.3
V
V
V
IH
=Vcc±0.3V;
0.2
5
uA
Vcc Standby Current
Vcc Standby Current
Vcc=Vcc max ; /Reset=Vss±0.3V
0.2
5
uA
Vcc=Vcc max ; /CE,/Reset=Vcc±0.3V
0.2
5
uA
/CE=V
IL
, /OE=V
IH
20
30
mA
5MHZ
1MHZ
9
2
16
4
Byte Mode
5MHZ
1MHZ
9
2
±1.0
35
±1.0
16
4
mA
uA
uA
uA
TEST CONDITIONS
MIN
TYP.
MAX
UNIT
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REV.02(August,2002)
3
HANbit Electronics Co., Ltd.
HANBit
Voltage for Autoselect and
V
ID
Temporary Unprotect
V
OL
V
OH1
Output High Voltage
V
OH2
V
LKO
Note :
1. The Icc current listed is typically less 2mA/MHz, with /OE at V
IH
. Typical Vcc is 3.0V.
2. Icc active while Embedded Erase or Embedded Program is progress.
Low Vcc Lock-Out Voltage
I
OH
=-100uA, Vcc= Vcc min
Output Low Voltage
I
OL
=4.0mA, Vcc=Vcc min
0.85xVc
I
OH
=-2.0mA, Vcc=Vcc min
c
Vcc-0.4
2.3
Vcc=3.3V
11.5
HMF3M32M6V
12.5
0.45
V
V
V
V
2.5
V
3. Automatic sleep mode enables the low power mode when addresses remain stable for t
ACC
+30ns. Typical
sleep mode current is 200nA.
4. Not 100% tested.
LATCHUP CHARACTERISTICS
DESCRIPTION
Input Voltage with respect to Vss on all pins except I/O Pins
-1.0V
(Including A9,/OE, and /Reset)
Input Voltage with respect to Vss on all I/O Pins
Vcc Current
Includes all pins except Vcc. Test conditions: Vcc=3.0V, one pin at a time.
-1.0V
-100mA
Vcc+1.0V
+100mA
12.5V
MIN
MAX
DATA RETENTION
PARAMETER
Minimum Pattern Data
Retention Time
TEST CONDITIONS
150 C
125 C
O
O
MIN
10
20
UNIT
Years
Years
ERASE AND PROGRAMMING PERFORMANCE
TYP
PARAMETER
(NOTE1)
Sector Erase Time
Chip Erase Time
Byte Programming Time
Word Programming Time
Chip Programming Time Byte Mode
(Note3)
Notes :
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REV.02(August,2002)
MAX (NOTE2)
0.7
25
9
11
18
12
300
360
54
36
15
UNIT
s
s
us
us
COMMENTS
Excludes 00h programming prior to
erasure (Note4)
Excludes system level overhead
s
s
(Note5)
Word Mode
4
HANbit Electronics Co., Ltd.
HANBit
O
HMF3M32M6V
1. Typical program and erase times assume the following conditions: 25 C, 3.0V Vcc, 1,000,000 cycles. Additionally
programming typical assume checkerboard pattern.
2. Under worst case conditions of 90 C, Vcc=2.7V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since
most bytes program faster than the maximum program times listed
4. In the pre-programming step of the Embedded Erase algorithm, all byt es are programmed to 00h before erasure.
5. System-level overhead is the time required to excute the two-or four-bus-cycle sequence for the program command.
See table 9 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
O
SOP/TSOP PIN CAPACITANCE
PARAMETER
SYMBOL
C
IN
C
OUT
C
IN2
PARAMETER
TEST SETUP
DESCRIPTION
Input Capacitance
Output Capacitance
Control Pin Capacitance
V
IN
= 0
V
OUT
= 0
V
IN
= 0
6
8.5
7.5
7.5
12
9
pF
pF
pF
TYP.
MAX
UNIT
Notes
: 1. Sampled, not 100% tested
2.Test conditions T
A
= 25 C, f=1.0 MHz.
o
TEST SPECIFICATIONS
TEST CONDITION
Output load
Output load capacitance,
30
C
L
(Including jig capacitance)
Input rise and fall times
Input pulse levels
Input timing measurement reference levels
Output timing measurement reference levels
5
0.0 - 3.0
1.5
1.5
ns
V
V
V
100
pF
80R
-90/ -120
1TTL gate
UNIT
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REV.02(August,2002)
5
HANbit Electronics Co., Ltd.
