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HMT351V7TMR4C-H9

DDR DRAM Module, 512MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240

器件类别：存储    存储   

厂商名称：SK Hynix(海力士)

厂商官网：http://www.hynix.com/eng/

器件标准：

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参数 预览 参数对比
器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
SK Hynix(海力士)
零件包装代码
DIMM
包装说明
DIMM, DIMM240,40
针数
240
Reach Compliance Code
unknown
ECCN代码
EAR99
访问模式
DUAL BANK PAGE BURST
最长访问时间
0.255 ns
其他特性
AUTO/SELF REFRESH
最大时钟频率 (fCLK)
667 MHz
I/O 类型
COMMON
JESD-30 代码
R-XDMA-N240
JESD-609代码
e1
长度
133.35 mm
内存密度
38654705664 bit
内存集成电路类型
DDR DRAM MODULE
内存宽度
72
功能数量
1
端口数量
1
端子数量
240
字数
536870912 words
字数代码
512000000
工作模式
SYNCHRONOUS
最高工作温度
85 °C
最低工作温度
组织
512MX72
输出特性
3-STATE
封装主体材料
UNSPECIFIED
封装代码
DIMM
封装等效代码
DIMM240,40
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度）
260
电源
1.5 V
认证状态
Not Qualified
刷新周期
8192
座面最大高度
18.9 mm
自我刷新
YES
最大待机电流
0.588 A
最大压摆率
4.274 mA
最大供电电压 (Vsup)
1.575 V
最小供电电压 (Vsup)
1.425 V
标称供电电压 (Vsup)
1.5 V
表面贴装
NO
技术
CMOS
温度等级
OTHER
端子面层
Tin/Silver/Copper (Sn/Ag/Cu)
端子形式
NO LEAD
端子节距
1 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
20
文档预览
240pin DDR3 SDRAM VLP Registered DIMM
DDR3 SDRAM VLP
Registered DIMM
Based on 1Gb T-die
HMT112V7TFR8C
HMT125V7TFR8C
HMT125V7TFR4C
HMT351V7TMR4C
*Hynix Semiconductor reserves the right to change products or specifications without notice.
Rev. 0.1 / Feb. 2010
1
Revision History
Revision No.
0.1
History
Initial Release
Draft Date
Mar.2009
Remark
Preliminary
Rev. 0.1 / Feb. 2010
2
Description
Hynix VLP (Very Low Profile) registered DDR3 SDRAM DIMMs (Registered Double Data Rate Synchronous
DRAM Dual In-Line Memory Modules) are low power, high-speed operation memory modules that use
Hynix DDR3 SDRAM devices. These Registered SDRAM DIMMs are intended for use as main memory when
installed in systems such as servers and workstations.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Power Supply: VDD=1.5V (1.425V to 1.575V)
VDDQ = 1.5V (1.425V to 1.575V)
VDDSPD=3.0V to 3.6V
Functionality and operations comply with the DDR3L SDRAM datasheet
8 internal banks
Data transfer rates: PC3-10600, PC3-8500
Bi-Directional Differential Data Strobe
8 bit pre-fetch
Burst Length (BL) switch on-the-fly BL8 or BC4(Burst Chop)
Supports ECC error correction and detection
On-Die Termination (ODT)
Temperature sensor with integrated SPD
* This product is in compliance with the RoHS directive.
Ordering Information
Part Number
HMT112V7TFR8C-G7/H9
HMT125V7TFR8C-G7/H9
HMT125V7TFR4C-G7/H9
HMT351V7TMR4C-G7/H9
Density
1GB
2GB
2GB
4GB
Organization
128Mx72
256Mx72
256Mx72
512Gx72
Component Composition
128Mx8(H5TQ1G83TFR)*9
128Mx8(H5TQ1G83TFR)*18
256Gx4(H5TQ1G43TFR)*18
DDP 512Gx4(H5TQ2G43TMR)*18
# of
ranks
1
2
1
2
FDHS
X
X
X
O
* In order to uninstall FDHS, please contact sales administrator
Rev. 0.1 / Feb. 2010
3
Key Parameters
MT/s
DDR3-1066
DDR3-1333
Grade
-G7
-H9
tCK
(ns)
1.875
1.5
CAS
Latency
(tCK)
7
9
tRCD
(ns)
13.125
13.5
tRP
(ns)
13.125
13.5
tRAS
(ns)
37.5
36
tRC
(ns)
50.625
49.5
CL-tRCD-tRP
7-7-7
9-9-9
Speed Grade
Frequency [MHz]
Grade
CL6
-G7
-H9
800
800
CL7
1066
1066
CL8
1066
1066
1333
1333
CL9
CL10
Remark
Address Table
1GB(1Rx8)
Refresh
Method
Row Address
Column
Address
Bank Address
Page Size
8K/64ms
A0-A14
A0-A9
BA0-BA2
1KB
2GB(2Rx8)
8K/64ms
A0-A14
A0-A9
BA0-BA2
1KB
2GB(1Rx4)
8K/64ms
A0-A14
A0-A9,A11
BA0-BA2
1KB
4GB(2Rx4)
8K/64ms
A0-A14
A0-A9,A11
BA0-BA2
1KB
Rev. 0.1 / Feb. 2010
4
Pin Descriptions
Pin Name
CK0
CK0
CK1
CK1
CKE[1:0]
RAS
Description
Clock Input, positive line
Clock Input, negative line
Clock Input, positive line
Clock Input, negative line
Clock Enables
Row Address Strobe
Num
ber
1
1
1
1
2
1
Pin Name
ODT[1:0]
DQ[63:0]
CB[7:0]
DQS[8:0]
DQS[8:0]
DM[8:0]/
DQS[17:9],
TDQS[17:9]
DQS[17:9],
TDQS[17:9]
EVENT
TEST
RESET
V
DD
V
SS
V
REFDQ
V
REFCA
V
TT
V
DDSPD
Description
On Die Termination Inputs
Data Input/Output
Data check bits Input/Output
Data strobes
Data strobes, negative line
Data Masks / Data strobes,
Termination data strobes
Data strobes, negative line,
Termination data strobes
Reserved for optional hardware
temperature sensing
Memory bus test tool (Not Con-
nected and Not Usable on DIMMs)
Register and SDRAM control pin
Power Supply
Ground
Reference Voltage for DQ
Reference Voltage for CA
Termination Voltage
SPD Power
Num
ber
2
64
8
9
9
9
CAS
WE
S[3:0]
A[9:0],A11,
A[15:13]
A10/AP
A12/BC
BA[2:0]
SCL
SDA
SA[2:0]
Par_In
Err_Out
Column Address Strobe
Write Enable
Chip Selects
Address Inputs
Address Input/Autoprecharge
Address Input/Burst chop
SDRAM Bank Addresses
Serial Presence Detect (SPD)
Clock Input
SPD Data Input/Output
SPD Address Inputs
Parity bit for the Address and
Control bus
Parity error found on the
Address and Control bus
1
1
4
14
1
1
3
1
1
3
1
1
9
1
1
1
22
59
1
1
4
1
Rev. 0.1 / Feb. 2010
5
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参数对比
与HMT351V7TMR4C-H9相近的元器件有：HMT112V7TFR8C-H9、HMT112V7TFR8C-G7、HMT125V7TFR8C-G7、HMT351V7TMR4C-G7、HMT125V7TFR8C-H9、HMT125V7TFR4C-G7、HMT125V7TFR4C-H9。描述及对比如下：
型号 HMT351V7TMR4C-H9 HMT112V7TFR8C-H9 HMT112V7TFR8C-G7 HMT125V7TFR8C-G7 HMT351V7TMR4C-G7 HMT125V7TFR8C-H9 HMT125V7TFR4C-G7 HMT125V7TFR4C-H9
描述 DDR DRAM Module, 512MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 128MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 128MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 256MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 512MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 256MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 256MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240 DDR DRAM Module, 256MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240
是否Rohs认证 符合 符合 符合 符合 符合 符合 符合 符合
厂商名称 SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士) SK Hynix(海力士)
零件包装代码 DIMM DIMM DIMM DIMM DIMM DIMM DIMM DIMM
包装说明 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40 DIMM, DIMM240,40
针数 240 240 240 240 240 240 240 240
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknow unknow
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 DUAL BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST
最长访问时间 0.255 ns 0.255 ns 0.3 ns 0.3 ns 0.3 ns 0.255 ns 0.3 ns 0.255 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
最大时钟频率 (fCLK) 667 MHz 667 MHz 533 MHz 533 MHz 533 MHz 667 MHz 533 MHz 667 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240 R-XDMA-N240
JESD-609代码 e1 e1 e1 e1 e1 e1 e1 e1
长度 133.35 mm 133.35 mm 133.35 mm 133.35 mm 133.35 mm 133.35 mm 133.35 mm 133.35 mm
内存密度 38654705664 bit 9663676416 bit 9663676416 bit 19327352832 bit 38654705664 bit 19327352832 bit 19327352832 bi 19327352832 bi
内存集成电路类型 DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE
内存宽度 72 72 72 72 72 72 72 72
功能数量 1 1 1 1 1 1 1 1
端口数量 1 1 1 1 1 1 1 1
端子数量 240 240 240 240 240 240 240 240
字数 536870912 words 134217728 words 134217728 words 268435456 words 536870912 words 268435456 words 268435456 words 268435456 words
字数代码 512000000 128000000 128000000 256000000 512000000 256000000 256000000 256000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
组织 512MX72 128MX72 128MX72 256MX72 512MX72 256MX72 256MX72 256MX72
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装代码 DIMM DIMM DIMM DIMM DIMM DIMM DIMM DIMM
封装等效代码 DIMM240,40 DIMM240,40 DIMM240,40 DIMM240,40 DIMM240,40 DIMM240,40 DIMM240,40 DIMM240,40
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度） 260 260 260 260 260 260 260 260
电源 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
刷新周期 8192 8192 8192 8192 8192 8192 8192 8192
座面最大高度 18.9 mm 18.9 mm 18.9 mm 18.9 mm 18.9 mm 18.9 mm 18.9 mm 18.9 mm
自我刷新 YES YES YES YES YES YES YES YES
最大待机电流 0.588 A 0.318 A 0.318 A 0.408 A 0.588 A 0.408 A 0.408 A 0.408 A
最大压摆率 4.274 mA 2.204 mA 1.979 mA 2.249 mA 3.734 mA 2.519 mA 3.194 mA 3.644 mA
最大供电电压 (Vsup) 1.575 V 1.575 V 1.575 V 1.575 V 1.575 V 1.575 V 1.575 V 1.575 V
最小供电电压 (Vsup) 1.425 V 1.425 V 1.425 V 1.425 V 1.425 V 1.425 V 1.425 V 1.425 V
标称供电电压 (Vsup) 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V
表面贴装 NO NO NO NO NO NO NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 OTHER OTHER OTHER OTHER OTHER OTHER OTHER OTHER
端子面层 Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
端子形式 NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
端子节距 1 mm 1 mm 1 mm 1 mm 1 mm 1 mm 1 mm 1 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 20 20 20 20 20 20 20 20
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器件捷径:
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
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