HS-2420RH
OBSOLETE PRODUCT
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
DATASHEET
FN3554
Rev 4.00
December 2, 2013
Radiation Hardened Fast Sample and Hold
The HS-2420RH is a radiation hardened monolithic circuit
consisting of a high performance operational amplifier with
its output in series with an ultra-low leakage analog switch
and MOSFET input unity gain amplifier.
With an external hold capacitor connected to the switch output,
a versatile, high performance sample-and-hold or track-and-
hold circuit is formed. When the switch is closed, the device
behaves as an operation amplifier, and any of the standard op
amp feedback networks may be connected around the device
to control gain, frequency response, etc. When the switch is
opened the output will remain at its last level.
Performance as a sample-and-hold compares very favorably
with other monolithic, hybrid, modular, and discrete circuits.
Accuracy to better than 0.01% is achievable over the
temperature range. Fast acquisition is coupled with superior
droop characteristics, even at high temperatures. High slew
rate, wide bandwidth, and low acquisition time produce
excellent dynamic characteristics. The ability to operate at
gains greater than 1 frequently eliminates the need for
external scaling amplifiers.
The device may also be used as a versatile operational
amplifier with a gated output for applications such as analog
switches, peak holding circuits, etc.
Specifications for Rad Hard QML devices are controlled
by the Defense Logistics Agency Land and Maritime
(DLA). The SMD numbers listed here must be used when
ordering.
Detailed Electrical Specifications for these devices are
contained in SMD
5962-95669.
14 LEAD METAL-SEALED SIDE-BRAZED CERAMIC DIP
MIL-STD-1835, CDIP2-T14
TOP VIEW
14 SAMPLE/HOLD
CONTROL
13 GND
12 NC
11 HOLD CAPACITOR
10 NC
9 V+
8 NC
Features
• Electrically Screened to SMD #
5962-95669
• QML Qualified per MIL-PRF-38535 Requirements
• Maximum Acquisition Time
- 10V Step to 0.1% . . . . . . . . . . . . . . . . . . . . . . . . . . 4s
- 10V Step to 0.01% . . . . . . . . . . . . . . . . . . . . . . . . . 6s
• Maximum Drift Current . . . . . . . . . . . . . . . . . . . . . . . 10nA
(Maximum Over Temperature)
• TTL Compatible Control Input
• Power Supply Rejection . . . . . . . . . . . . . . . . . . . . .
80dB
• Total Dose . . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
• No Latch-Up
Applications
• Data Acquisition Systems
• D to A Deglitcher
• Auto Zero Systems
• Peak Detector
• Gated Op Amp
Functional Diagram
OFFSET
ADJUST
3
4
V+
5
-
INPUT
+ INPUT
1
2
14
+
-
+
-
7
OUTPUT
HS-2420RH
IN- 1
IN+ 2
OFFSET ADJUST 3
OFFSET ADJUST 4
V- 5
NC 6
OUTPUT 7
SAMPLE/
HOLD
CONTROL
13
5
11
GND V-
HOLD
CAPACITOR
FN3554 Rev 4.00
December 2, 2013
Page 1 of 10
HS-2420RH
Ordering Information
ORDERING SMD NUMBER
(Note 1)
5962R9566901VCC
HS1B-2420RH/PROTO
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in the
“Ordering Information” table must be used when ordering.
PART NUMBER
(Note 2)
HS1B-2420RH-Q
HS1B-2420RH/PROTO
TEMPERATURE
RANGE
(°C)
-55 to +125
-55 to +125
PACKAGE
(RoHS Compliant)
14 Ld SBDIP
14 Ld SBDIP
D14.3
D14.3
PKG.
DWG. #
FN3554 Rev 4.00
December 2, 2013
Page 2 of 10
HS-2420RH
Test Circuits
V
DC
ALL RESISTORS =
1%
ALL CAPACITORS =
10%
100k
10k
+V
CC
-V
CC
S
2
2
S/H
2
1
1
S
7
-
DUT
+
A
S
4
GND
1 OPEN
S
5
2k
1
2
3
100k
+
50
2
1
S
1
2
S
6
1
2
S
7
-
NULL
AMP
X1
X-1
BUFFER
1
50
CH =
1000pF
S
3
3
2
1 50pF
+V
CC
1M
V
AC
50
+
I
LOAD
-
AOUT
4
3
2
S
8
1
EOUT
FIGURE 1. TEST FIXTURE SCHEMATIC (SWITCH POSITIONS S
1
- S
8
DETERMINE CONFIGURATION)
+5V
SINEWAVE
INPUT
IN2
IN1
IN3
IN4
IN5
IN6
IN7
IN8
A2
A1
EN
+15V
-15V
+15V
-15V
OUT
V
IN
+
-
DUT
2k
CH =
1000pF
V
OUT
50pF
50
DUT +
2k
S/H
CH =
1000pF
-
V
OUT
50pF
A0
SAMPLE/HOLD
CONTROL INPUT
NOTE: Compute Hold Mode Feedthrough Attenuation from the
Formula:
V
OUT HOLD
FeedthroughAttenuation = 20
log
-------------------------------
-
V
IN HOLD
Where V
OUT HOLD
= Peak-Peak Value of Output Sinewave during
the Hold Mode.
FIGURE 2. HOLD MODE FEEDTHROUGH ATTENUATION
NOTE: GBWP is the Frequency of V
INPUT
at which:
V
OUT
20
log
--------------------
= – 3dB
-
V
INPUT
FIGURE 3. GAIN BANDWIDTH PRODUCT
FN3554 Rev 4.00
December 2, 2013
Page 3 of 10
HS-2420RH
Test Circuits
(Continued)
SEND SAMPLE
COMMAND
SET t
2
TO 7s
INITIALLY
COURSE t
ACQ
MEASUREMENT LOOP
FINE t
ACQ
MEASUREMENT LOOP
DIGITIZE V
1
AT t
1
(
10s)
INCREMENT t
2
BY 50ns
(50ns LONGER DELAY)
DIGITIZE V
2
AT t
2
DECREMENT
t
2
BY 50ns
DIGITIZE V
1
AT t
1
(
10s)
CALCULATE V
1
- V
2
IS
V
0.01%?
YES
DIGITIZE V
2
AT t
2
NO
DECREMENT
t
2
BY 50ns
RECORD
t
ACQ
YES
CALCULATE V
1
- V
2
IS
V
0.01%?
NO
NOTE: See Test Diagram, Timing Diagram
FIGURE 4. ACQUISITION TIME (t
ACQ
TO 0.01% IS SHOWN, t
ACQ
TO 0.1% IS DONE IN THE SAME MANNER)
t
1
HS-2420RH
V
1
V
1
DIGITIZER
+
50pF
2k
1000pF
t
1
V
2
DIGITIZER
V
2
+
+10V
0V
OR
0V
-10V
S/H
CONTROL
-
-
COMPUTER
CONTROLLER
DELAY
t
2
VARIABLE
DELAY
10s
t
2
DELAY
CONTROL
FIGURE 5.
FN3554 Rev 4.00
December 2, 2013
Page 4 of 10
HS-2420RH
Timing Waveforms
10V
V
IN
(POS t
ACQ
CASE)
S/H CONTROL
0V
2V
0V
0.01% OR 0.1%
ENVELOPE
10V
DUT OUTPUT
(POS t
ACQ
CASE)
t
1
0V
(t
1
DIGITIZER COMMAND)
t
1
10s
t
2
(t
2
DIGITIZER COMMAND)
t
2
FIGURE 6. TIMING DIAGRAM FOR ACQUISITION TIME, (POSITIVE t
ACQ
CASE)
V
FINAL
10%
+V
0V
V
PEAK
90%
INPUT
0V
+OS, t
R
-OS, t
F
-V
10%
90%
V
FINAL
V
PEAK
t
R
t
F
FIGURE 7A.
FIGURE 7B.
FIGURE 7. OVERSHOOT, RISE AND FALL TIME WAVEFORMS
+V
+V
+V
75%
+V
25%
75%
-V
t
t
INPUT
25%
-V
+SL
-SL
-V
-V
FIGURE 8A.
FIGURE 8B.
FIGURE 8. SLEW RATE WAVEFORMS
FN3554 Rev 4.00
December 2, 2013
Page 5 of 10
