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HS-26C32RH-T
Functional Diagram
ENABLE
ENABLE DIN DIN
CIN CIN
BIN BIN
AIN AIN
+
-
+
-
+
-
+
-
DOUT
COUT
BOUT
AOUT
TRUTH TABLE
INPUTS
DEVICE POWER
ON/OFF
OUTPUT
ENABLE
ENABLE
INPUT
OUT
ON
0
1
X
HI-Z
ON
1
X
VID
≥
VTH (Max)
1
ON
1
X
VID
≤
VTH (Min)
0
ON
X
0
VID
≥
VTH (Max)
1
ON
X
0
VID
≤
VTH (Min)
0
ON
1
X
Open
1
ON
X
0
Open
1
2
HS-26C32RH-T
Die Characteristics
DIE DIMENSIONS:
2140µm x 3290µm x 533µm
±25.4µm
(85 x 130 x 21mils
±1mil)
METALLIZATION:
M1: Mo/Tiw
Thickness: 5800
Å
M2: Al/Si/Cu
Thickness: 10k
Å
±1k
Å
SUBSTRATE POTENTIAL:
Internally connected to V
DD
. May be left floating.
BACKSIDE FINISH:
Silicon
PASSIVATION:
Type: SiO
2
Thickness: 8k
Å
±1k
Å
WORST CASE CURRENT DENSITY:
< 2.0e5 A/cm
2
TRANSISTOR COUNT:
315
PROCESS:
Radiation Hardened CMOS, AVLSI
Metallization Mask Layout
HS-26C32RH
AIN
(1)
V
DD
(16)
BIN
(15)
AIN (2)
(14) BIN
AOUT (3)
(13) BOUT
ENAB (4)
(12) ENAB
COUT (5)
(11) DOUT
CIN (6)
(10) DIN
(7)
CIN
(8)
GND
(9)
DIN
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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