Number of Transistors or Gates . . . . . . . . . . . . 190,000 Transistors
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. DC ELECTRICAL PERFORMANCE SPECIFICATIONS
GROUP A
SUBGROU
P
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
TEMPERATURE
(
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
PARAMETER
Logical One Input Voltage
Logical Zero Input Voltage
Clock Input High
Clock Input Low
Output HIGH Voltage
SYMBOL
V
IH
V
IL
V
IHC
V
ILC
V
OH
V
OL
I
I
I
O
I
CCSB
TEST CONDITIONS
V
CC
= 5.5V
V
CC
= 4.5V
V
CC
= 5.5V
V
CC
= 4.5V
I
OH
= 400mA,
V
CC
= 4.75V (Note 2)
I
OL
= +2.0mA,
V
CC
= 4.5V (Note 2)
V
IN
= V
CC
or GND,
V
CC
= 5.5V
V
OUT
= V
CC
or GND
V
CC
= 5.5V
V
IN
= V
CC
or GND,
V
CC
= 5.5V,
Outputs Open (Note 5)
f = 20.0MHz,
V
CC
= 5.5V
Outputs Open,
(Note 3, 5)
(Notes 4, 5)
MIN
2.2
-
3.0
-
2.6
MAX
-
0.8
-
0.8
-
UNITS
V
V
V
V
V
Output LOW Voltage
1, 2, 3
-
0.4
V
µA
µA
µA
Input Leakage Current
1, 2, 3
-10
+10
Output or I/O
Leakage Current
Standby Power Supply Current
1, 2, 3
-10
+10
1, 2, 3
-
500
Operating Power Supply Current
I
CCOP
1, 2, 3
-55
≤
T
A
≤
125
-
160.0
mA
Functional Test
NOTES:
FT
7, 8
-55
≤
T
A
≤
125
-
-
-
2. Interchanging of force and sense conditions is permitted.
3. Operating supply current is proportional to frequency, typical rating is 8.0mA/MHz.
4. Tested as follows: f = 1MHz, V
IH
= 2.6, V
IL
= 0.4, V
OH
≥
1.5V, V
OL
≤
1.5V, V
IHC
= 3.4V, and V
ILC
= 0.4V.
5. Loading is as specified in the test load circuit with C
L
= 40pF.
3
HSP48908/883
TABLE 2. AC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at: V
CC
= 5.0V
±10%,
T
A
= -55
o
C to 125
o
C (Note 9)
-27 (27MHz)
PARAMETER
Clock Period
Clock Pulse Width
High
Clock Pulse Width Low
Data Input Setup Time
Data Input Hold Time
Clock to Data Out
Address Setup Time
Address Hold Time
Configuration Data
Setup Time
Configuration Data
Hold Time
LD Pulse Width
LD Setup Time
CIN7-0 Setup to CLK
CIN7-0 Hold to CLK
CS Setup to LD
CS Setup to LD
RESET Pulse Width
FRAME Setup to Clock
FRAME Pulse Width
EALU Setup Time
EALU Hold Time
HOLD Setup Time
HOLD Hold Time
Output Enable Time
NOTES:
6. This specification applies only to the case where the HSP48908/883 is being written to during an active convolution cycle. It must be met in order
to achieve predictable results at the next rising clock edge. In most applications, the configuration data and coefficients are loaded
asynchronously and the t
LCS
Specification may be disregarded.
7. While FRAME is an asynchronous signal, it must be deasserted a minimum of t
FS
ns prior to the rising clock edge which is to begin loading pixel
data for a new frame.
8. Transition is measured at
±200mV
from steady state voltage with loading as specified in test load circuit with C
L
= 40pF.
9. AC Testing is performed as follows: Input levels (CLK input) 4.0V and 0V, input levels (all other inputs) 0V and 3.0V, timing reference levels
(CLK) = 2.0V, (others) = 1.5V. Output load per test load circuit with C
L
= 40pF. Output transition is measured at V
OH
≥
1.5V and V
OL
≤
1.5V.
SYMBOL
t
CYCLE
t
PWH
t
PWL
t
DS
t
DH
t
OUT
t
AS
t
AH
t
CDS
t
CDH
t
LPW
t
LCS
t
CS
t
CH
t
CSS
t
CSH
t
RPW
t
FS
t
FPW
t
ES
t
EH
t
HS
t
HH
t
EN
Note 8
Note 7
Note 6
NOTES
GROUP A
SUBGROUP
9, 10, 11
9, 10, 11
TEMP (
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
MIN
37
15
MAX
-
-
-20 (20MHz)
MIN
50
20
MAX
-
-
UNITS
ns
ns
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
15
16
0
-
15
0
17
-
-
-
19
-
-
-
20
17
0
-
15
0
20
-
-
-
28
-
-
-
ns
ns
ns
ns
ns
ns
ns
9, 10, 11
0
-
0
-
ns
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
15
30
17
0
0
0
37
25
37
15
0
13
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
19
20
37
20
0
0
0
50
30
50
17
0
14
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
28
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
HSP48908/883
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS
TEMP
(
o
C)
T
A
= 25
-27
MIN
-
MAX
10
MIN
-
-20
MAX
10
UNITS
pF
PARAMETERS
Input Capacitance
SYMBOL
C
IN
CONDITIONS
V
CC
= Open
f = 1MHz,
all measurements are
referenced to device
GND
V
CC
= Open
f = 1MHz,
all measurements are
referenced to device
GND
NOTES
10
Output Capacitance
C
O
10
T
A
= 25
-
12
-
12
pF
Output Disable Time
Output Rise Time
Output Fall Time
NOTES:
t
OZ
t
r
t
f
From 0.8V to 2.0V
From 2.0V to 0.8V
10, 11
10, 11
10, 11
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-
-
-
35
6
6
-
-
-
40
6
6
ns
ns
ns
10. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are characterized
upon initial design and after major process and/or design changes.
11. Loading is as specified in the test load circuit with C
