This family is a 64M bit dynamic RAM organized 16,777,216 x 4-bit configuration with Fast Page mode CMOS DRAMs.
Fast Page mode offers high speed of random access memory within the same row. The circuit and process design allow
this device to achieve high performance and low power dissipation. Optional features are access time(50 or 60ns) and
refresh cycle(8K ref. or 4K ref.) and power consumption (Normal or Low power with self refresh). Hyundai’s advanced
circuit design and process technology allow this device to achieve high bandwidth, low power consumption and high
reliability.
FEATURES
Ÿ
Fast page mode operation
Ÿ
Read-modify-write capability
Ÿ
Multi-bit parallel test capability
Ÿ
LVTTL(3.3V) compatible inputs and outputs
Ÿ
/CAS-before-/RAS, /RAS-only, Hidden and
Self refresh capability
Ÿ
Max. Active power dissipation
Speed
50
60
Ÿ
Refresh cycles
Part number
HY51V64160A
1)
HY51V65160A
2)
Refresh
8K
64ms
4K
128ms
Normal
L-part
8K refresh
396mW
324mW
4K refresh
504mW
432mW
Ÿ
JEDEC standard pinout
32-pin plastic SOJ/TSOP-II (400mil)
Ÿ
Single power supply of 3.3
±
0.3V
Ÿ
Early write or output enable controlled write
Ÿ
Fast access time and cycle time
Speed
50
60
tRAC
50ns
60ns
tCAC
13ns
15ns
tPC
35ns
40ns
1) Normal read / write, /RAS only refresh : 8K cycles / 64ms
/CAS-before-/RAS, Hidden refresh
: 4K cycles / 64ms
2) Normal read / write, /RAS only refresh : 4K cycles / 64ms
/CAS-before-/RAS, Hidden refresh
: 4K cycles / 64ms
ORDERING INFORMATION
Part Name
HY51V64400ATC
HY51V64400ALTC
HY51V64400ASLTC
HY51V65400ATC
HY51V65400ALTC
HY51V65400ASLTC
*SL : Self refresh with low power.
Refresh
8K
8K
8K
4K
4K
4K
Power
Package
32Pin SOJ/TSOP-II
L-part
*SL-part
32Pin SOJ/TSOP-II
32Pin SOJ/TSOP-II
32Pin SOJ/TSOP-II
L-part
*SL-part
32Pin SOJ/TSOP-II
32Pin SOJ/TSOP-II
This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of
circuits described. No patent licences are implied
Hyundai Semiconductor
Rev. 10/Sep.98
1
HY51V64400A,HY51V65400A
FUNCTIONAL BLOCK DIAGRAM
DQ0 DQ1 DQ2 DQ3
4
4
Data Output Buffer
DQ0~3
OE
Data Input Buffer
DQ0~3
WE
CAS
4
4
CAS Clock
Generator
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
*(A12)
Cloumn Predecoder
(11/12)*
(11/12)*
Column Decoder
Address Buffer
Refresh Controller
Sense Amp
I/O Gate
Refresh Counter
Row
Decoder
Row Predecoder
(13/12)*
(13/12)*
Memory Array
16,777,216 x 4
RAS
RAS Clock
Generator
Substrate Bias
Generator
V
CC
V
SS
X32 Parallel
Test
*(A12) for 8K refresh part
(8K Refresh / 4K Refresh)*
16Mx4,FP DRAM
Rev. 10/Sep.98
2
HY51V64400A,HY51V65400A
PIN CONFIGURATION
(Marking Side)
V
CC
DQ0
DQ1
N.C
N.C
N.C
N.C
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
•
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
SS
DQ3
DQ2
N.C
N.C
N.C
CAS
OE
A12(N.C)*
A11
A10
A9
A8
A7
A6
V
SS
V
CC
DQ0
DQ1
N.C
N.C
N.C
N.C
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
•
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
SS
DQ3
DQ2
N.C
N.C
N.C
CAS
OE
A12(N.C)*
A11
A10
A9
A8
A7
A6
V
SS
32Pin Plastic SOJ (400mil)
32Pin Plastic TSOP-II (400mil)
A12(N.C)* : For 4K refresh product
PIN DESCRIPTION
Pin Name
/RAS
/CAS
/WE
/OE
A0~A12
A0~A11
DQ0~DQ3
Vcc
Vss
NC
Parameter
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Address Input (8K Refresh Product)
Address Input (4K Refresh Product)
Data In/Out
Power (3.3V)
Ground
No Connection
16Mx4,FP DRAM
Rev.10/Sep.98
3
HY51V64400A,HY51V65400A
ABSOLUTE MAXIMUM RATING
Symbol
T
A
T
STG
V
IN,
V
OUT
V
CC
I
OS
P
D
T
SOLDER
Parameter
Ambient Temperature
Storage Temperature
Voltage on Any Pin relative to V
SS
Voltage on V
CC
relative to V
SS
Short Circuit Output Current
Power Dissipation
Soldering Temperature
Ÿ
Time
Rating
0 to 70
-55 to 150
-0.5 to 6.0
-0.5 to 4.6
50
1
260
Ÿ
10
Unit
°C
°C
V
V
mA
W
°C
Ÿ
sec
Note
: Operation at or above Absolute Maximum Ratings could adversely affect device reliability and cause permanent
damage.
RECOMMENDED DC OPERATING CONDITIONS
(T
A
= 0°C to 70°C )
Symbol
V
CC
V
IH
V
IL
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Min
3.0
2.0
-0.3
2)
Typ
3.3
-
-
Max
3.6
V
CC+
0.3
1)
0.8
UNIT
V
V
V
Note
: All voltages are referenced to V
SS
.
1) 6.0V at pulse width 10ns which is measured at V
CC
.
2) -1.0V at pulse width 10ns which is measured at V
SS
.
DC AND OPERATING CHARACTERISTICS
Symbol
I
LI
I
LO
Parameter
Input Leakage Current
(Any input)
Output Leakage Current
(Any input)
Output Low Voltage
Output High Voltage
Test condition
V
SS
≤
V
IN
≤
V
CC +
0.3
All other pins not under test
=
V
SS
V
SS
≤
V
OUT
≤
V
CC
/RAS&/CAS at V
IH
I
OL
= 2.0mA
I
OH
= -2.0mA
Min
-5
-5
-
2.4
Max
5
5
0.4
-
Unit
µA
µA
V
V
V
OL
V
OH
16Mx4,FP DRAM
Rev.10/Sep.98
4
HY51V64400A,HY51V65400A
DC CHARACTERISTICS
(T
A
= 0°C to 70°C , V
CC
= 3.3
±
0.3V , V
SS
= 0V, unless otherwise noted.)
Symbol
Parameter
Test condition
Speed
Max. Current
8K refresh
I
CC1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
Operating Current
LVTTL Standby
Current
/RAS-only Refresh
Current
FP mode Current
CMOS Standby
Current
/CAS-before-/RAS
Refresh Current
Battery Back-up
Current (L-part)
/RAS, /CAS Cycling
t
RC =
t
RC(min.)
/RAS, /CAS
≥
V
IH
Other inputs
≥
V
SS
/RAS Cycling,/CAS
=
V
IH
t
RC =
t
RC(min.)
/CAS Cycling, /RAS
=
V
IL
t
PC =
t
PC(min.)
/RAS
=
/CAS
≥
V
CC -
0.2V
t
RC =
t
RC(min.)
V
IH =
V
CC -
0.2V, V
IL =
0.2V
/CAS
=
CBR cycling or 0.2V
/OE&/WE
=
V
IH =
V
CC -
0.2V
Address
=
Don’t care
DQ0~DQ3
=
Open, tRAS
≤
300ns
tRC=31.25uS
/RAS&/CAS
=
0.2V
Other pins are same as I
CC7
50
60
50
60
L-part
50
60
50
60
110
90
1
110
90
90
80
500
300
140
120
4K refresh
140
120
1
140
120
100
90
500
300
140
120
mA
mA
mA
mA
µA
mA
Unit
I
CC7
550
550
µA
I
CC8
Self Refresh Current
(L-part)
450
450
µA
Note
1. I
CC1
, I
CC3
, I
CC4
and I
CC6
depend on output loading and cycle rates(t
RC
and t
PC
).
2. Specified values are obtained with output unloaded.
模拟与混合信号
