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IBM0116405J1-50

EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 X 0.675 INCH, SOJ-26/24

器件类别:存储    存储   

厂商名称:IBM

厂商官网:http://www.ibm.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
IBM
零件包装代码
SOJ
包装说明
SOJ, SOJ24/26,.34
针数
24
Reach Compliance Code
unknown
ECCN代码
EAR99
访问模式
FAST PAGE WITH EDO
最长访问时间
50 ns
其他特性
RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O 类型
COMMON
JESD-30 代码
R-PDSO-J24
JESD-609代码
e0
长度
17.145 mm
内存密度
16777216 bit
内存集成电路类型
EDO DRAM
内存宽度
4
功能数量
1
端口数量
1
端子数量
24
字数
4194304 words
字数代码
4000000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
4MX4
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
SOJ
封装等效代码
SOJ24/26,.34
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
5 V
认证状态
Not Qualified
刷新周期
4096
座面最大高度
3.75 mm
自我刷新
NO
最大待机电流
0.001 A
最大压摆率
0.085 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
J BEND
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.62 mm
文档预览
Discontinued (9/98 - last order; 3/99 last ship)
IBM01164054M x 412/10, 5.0V, EDOMMDD62DSU-001015231. IBM0116405P4M x 412/10, 3.3V, EDO, LP, SRMMDD62DSU-001015231. IBM0116405M4M x 412/10, 5.0V, EDO, LP, SRMMDD62DSU-001015231. IBM0116405B4M x 412/10, 3.3V, EDOMMDD62DSU-001015231.
IBM0116405 IBM0116405M
IBM0116405B IBM0116405P
4M x 4 12/10 EDO DRAM
Features
• 4,194,304 word by 4 bit organization
• Single 3.3V
±
0.3V or 5.0V
±
0.5V power supply
• Standard Power (SP) and Low Power (LP)
• 4096 Refresh Cycles
- 64 ms Refresh Rate (SP version)
- 256 ms Refresh Rate (LP version)
• High Performance:
-50
t
RAC
RAS Access Time
t
CAC
CAS Access Time
t
AA
t
RC
Column Address Access Time
Cycle Time
50
13
25
84
20
-60
60
15
30
104
25
Units
ns
ns
ns
ns
ns
• Low Power Dissipation
- Active (max) - 55 mA / 50 mA
- Standby: TTL Inputs (max) - 1.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
- 300µA (5.0 Volt)
• Extended Data Out (Hyper Page) Mode
• Read-Modify-Write
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
• Package: SOJ 26/24 (300milx675mil)
TSOP-26/24 (300milx675mil)
t
HPC
EDO (Hyper Page) Mode Cycle Time
Description
The IBM0116405 is a dynamic RAM organized
4,194,304 words by 4 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V
±
0.3V or 5.0V
±
0.5V power supply. The 22
addresses required to access any bit of data are
multiplexed (12 are strobed with RAS, 10 are
strobed with CAS).
Pin Assignments
(Top View)
Vcc
I/O0
I/O1
WE
RAS
A11
Pin Description
RAS
Row Address Strobe
Column Address Strobe
Read/Write Input
Address Inputs
Output Enable
Data Input/Output
Power (+3.3V or +5.0V)
Ground
CAS
WE
A0 - A11
OE
I/O0 - I/O3
V
CC
V
SS
1
2
3
4
5
6
26
25
24
23
22
21
Vss
I/O3
I/O2
CAS
OE
A9
A10
A0
A1
A2
A3
Vcc
8
9
10
11
12
13
19
18
17
16
15
14
A8
A7
A6
A5
A4
Vss
28H4720
SA14-4226-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 31
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116405
IBM0116405M
IBM0116405B IBM0116405P
4M x 4 12/10 EDO DRAM
Ordering Information
Part Number
IBM0116405T1 -50
IBM0116405T1 -60
IBM0116405BT1 -50
IBM0116405BT1 -60
IBM0116405J1 -50
IBM0116405J1 -60
IBM0116405BJ1 -50
IBM0116405BJ1 -60
IBM0116405MT1 -50
IBM0116405MT1 -60
IBM0116405PT1 -50
IBM0116405PT1 -60
IBM0116405MJ1 -50
IBM0116405MJ1 -60
IBM0116405PJ1 -50
IBM0116405PJ1 -60
SP / LP
SP
SP
SP
SP
SP
SP
SP
SP
LP
LP
LP
LP
LP
LP
LP
LP
Self
Refresh
No
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Power
Supply
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
3.3V
3.3V
Speed
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
50ns
60ns
Package
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil SOJ 26/24
300mil SOJ 26/24
300mil SOJ 26/24
300mil SOJ 26/24
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil TSOP-II 26/24
300mil TSOJ 26/24
300mil TSOJ 26/24
300mil TSOJ 26/24
300mil TSOJ 26/24
Notes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1. SP = Standard Power version (IBM0116405 and IBM0116405B); LP = Low Power version (IBM0116405M and IBM00116405P)
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4720
SA14-4226-06
Revised 4/97
Page 2 of 31
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116405 IBM0116405M
IBM0116405B IBM0116405P
4M x 4 12/10 EDO DRAM
Block Diagram
I/O0
I/O3
Vss
Vcc
(5.0 Volt version)
(to OCDs)
4
4
Regulator
V
DD
(internal)
Data In Buffer
Data Out Buffer
OE
WE
&
4
CAS Clock
Generator
4
CAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
10
Column Address
Buffer (10)
Column Decoder and I/O Gate
10
Sense Amplifiers
4
Refresh
Controller
1024 x 4
Refresh Counter
(10)
Row Decoder
12
Row Address
Buffer (10)
12
12
4096
Memory Array
4096 x 1024 x 4
RAS
RAS Clock
Generator
28H4720
SA14-4226-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 3 of 31
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116405
IBM0116405M
IBM0116405B IBM0116405P
4M x 4 12/10 EDO DRAM
Truth Table
Function
Standby
Read
Early-Write
Delayed-Write
Read-Modify-Write
EDO (Hyper Page) Mode
Read
EDO (Hyper Page) Mode
Write
EDO (Hyper Page) Mode
Read-Modify-Write
RAS-Only Refresh
CAS-Before-RAS Refresh
Read
Hidden Refresh
Write
Self Refresh (LP version only)
L→H→L
H→L
L
L
L→H
H
L
X
Row
X
Col
X
Data In
High Impedance
1st Cycle
2nd Cycle
1st Cycle
2nd Cycle
1st Cycle
2nd Cycle
RAS
H
L
L
L
L
L
L
L
L
L
L
L
H→L
L→H→L
CAS
H→X
L
L
L
L
H→L
H→L
H→L
H→L
H→L
H→L
H
L
L
WE
X
H
L
H→L
H→L
H
H
L
L
H→L
H→L
X
H
H
OE
X
L
X
H
L→H
L
L
X
X
L→H
L→H
X
X
L
Row
Column
Address Address
X
Row
Row
Row
Row
Row
N/A
Row
N/A
Row
N/A
Row
X
Row
X
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
N/A
N/A
Col
I/O0 - I/O3
High Impedance
Data Out
Data In
Data In
Data Out, Data In
Data Out
Data Out
Data In
Data In
Data Out, Data In
Data Out, Data In
High Impedance
High Impedance
Data Out
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4720
SA14-4226-06
Revised 4/97
Page 4 of 31
Discontinued (9/98 - last order; 3/99 last ship)
IBM0116405 IBM0116405M
IBM0116405B IBM0116405P
4M x 4 12/10 EDO DRAM
Absolute Maximum Ratings
Rating
Symbol
V
CC
V
IN
V
OUT
T
OPR
T
STG
P
D
I
OUT
Parameter
3.3 Volt Device
Power Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation
Short Circuit Output Current
-0.5 to +4.6
-0.5 to min (V
CC
+0.5, 4.6)
-0.5 to min (V
CC
+0.5, 4.6)
0 to +70
-55 to +150
1.0
50
5.0 Volt Device
-1.0 to +7.0
-0.5 to min (V
CC
+0.5, 7.0)
-0.5 to min (V
CC
+0.5, 7.0)
0 to +70
-55 to +150
1.0
50
V
V
V
°C
°C
W
mA
1
1
1
1
1
1
1
Units
Notes
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
Recommended DC Operating Conditions
3.3 Volt Device
Symbol
V
CC
V
IH
V
IL
Parameter
Min.
Supply Voltage
Input High Voltage
Input Low Voltage
3.0
2.0
-0.5
Typ.
3.3
(T
A
= 0 to 70˚C)
5.0 Volt Device
Units
Notes
1
1, 2
1, 2
Max.
3.6
V
CC
+ 0.5
0.8
Min.
4.5
2.4
-0.5
Typ.
5.0
Max.
5.5
V
CC
+ 0.5
0.8
V
V
V
1. All voltages referenced to V
SS
.
2. V
IH
may overshoot to V
CC
+ 1.2V for pulse widths of
4.0ns with 3.3 Volt, or V
CC
+ 2.0V for pulse widths of
4.0ns (or V
CC
+ 1.0V
for
8.0ns) with 5.0 Volt. Additionally, V
IL
may undershoot to -2.0V for pulse widths
4.0ns with 3.3 Volt, or to -2.0V for pulse
widths
4.0ns (or -1.0V for
8.0ns) with 5.0 Volt. Pulse widths measured at 50% points with amplitude measured peak to DC ref-
erence.
Capacitance
(T
A
= 25°C, V
CC
= 3.3V
±
0.3V or V
CC
= 5.0V
±
0.5V)
Symbol
C
I1
C
I2
C
O
Parameter
Input Capacitance (A0 - A11)
Input Capacitance (RAS, CAS, WE, OE)
Output Capacitance (I/O0 - I/O3)
Min.
Max.
5
7
7
Units
pF
pF
pF
Notes
1
1
1
1. Input capacitance measurements made with rise time shift method with CAS & RAS = V
IH
to disable output.
28H4720
SA14-4226-06
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 31
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