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IC61C1024-12JI

Standard SRAM, 128KX8, 12ns, CMOS, PDSO32,

器件类别:存储    存储   

厂商名称:Integrated Circuit Solution Inc

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Integrated Circuit Solution Inc
包装说明
SOJ, SOJ32,.34
Reach Compliance Code
unknown
最长访问时间
12 ns
I/O 类型
COMMON
JESD-30 代码
R-PDSO-J32
JESD-609代码
e0
内存密度
1048576 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
端子数量
32
字数
131072 words
字数代码
128000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
128KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
SOJ
封装等效代码
SOJ32,.34
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
并行/串行
PARALLEL
电源
5 V
认证状态
Not Qualified
最大待机电流
0.04 A
最小待机电流
4.5 V
最大压摆率
0.18 mA
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
J BEND
端子节距
1.27 mm
端子位置
DUAL
文档预览
IC61C1024
IC61C1024L
Document Title
128K x 8 High-Speed SRAM
Revision History
Revision No
0A
0B
History
Initial Draft
Revise typo on page 6 and page 8
Draft Date
March 13,2001
October 18,2001
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
1
IC61C1024
IC61C1024L
128K x 8 HIGH-SPEED
CMOS STATIC RAM
FEATURES
• High-speed access time: 12, 15, 20, 25 ns
Low active power: 600 mW (typical)
Low standby power: 500 µW (typical) CMOS
standby
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Low power version available: IC61C1024L
• Commercial and industrial temperature ranges
available
DESCRIPTION
The
ICSI
IC61C1024 and IC61C1024L are very high-speed,
low power, 131,072-word by 8-bit CMOS static RAMs. They
are fabricated using
ICSI's
high-performance CMOS
technology. This highly reliable process coupled with innovative
circuit design techniques, yields higher performance and low
power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable
inputs,
CE1
and CE2. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IC61C1024 and IC61C1024L are available in 32-pin
300mil SOJ, and 8*20mm TSOP-1, and 8*13.4mm TSOP-1
packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 x 2048
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
IC61C1024
IC61C1024L
PIN CONFIGURATION
32-Pin SOJ
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
32-Pin 8x20mm TSOP-1 and 8x13.4mm TSOP-1
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
PIN DESCRIPTIONS
A0-A16
CE1
CE2
OE
WE
I/O0-I/O7
Vcc
GND
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
Input/Output
Power
Ground
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
5V ± 10%
5V ± 10%
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
WE
X
X
H
H
L
CE1
H
X
L
L
L
CE2
X
L
H
H
H
OE
X
X
H
L
X
I/O Operation
High-Z
High-Z
High-Z
D
OUT
D
IN
Vcc Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
1
, I
CC
2
I
CC
1
, I
CC
2
I
CC
1
, I
CC
2
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
3
IC61C1024
IC61C1024L
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
–0.5 to +7.0
–55 to +125
–65 to +150
1.5
20
Unit
V
°C
°C
W
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
5
7
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, Vcc = 5.0V.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
GND
V
IN
V
CC
GND
V
OUT
V
CC
Outputs Disabled
Com.
Ind.
Com.
Ind.
Test Conditions
V
CC
= Min., I
OH
= –4.0 mA
V
CC
= Min., I
OL
= 8.0 mA
Min.
2.4
2.2
–0.3
–2
–5
–2
–5
Max.
0.4
V
CC
+ 0.5
0.8
2
5
2
5
Unit
V
V
V
V
µA
µA
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
4
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
IC61C1024
IC61C1024L
IC61C1024 POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
1
I
CC
2
I
SB
1
Vcc Operating
Supply Current
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
CC
= V
CC MAX
.,
CE
= V
IL
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
CC
= V
CC MAX
.,
CE
= V
IL
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
CC
= V
CC MAX
.,
V
IN
= V
IH
or V
IL
CE1
V
IH
, f = 0 or
CE2
V
IL
, f = 0
V
CC
= V
CC MAX
.,
CE1
V
CC
– 0.2V,
CE2
0.2V
V
IN
> V
CC
– 0.2V, or
V
IN
0.2V, f = 0
Com.
Ind.
-12 ns
Min. Max.
85
110
170
180
40
60
-15 ns
Min. Max.
85
110
160
170
40
60
-20 ns
Min. Max.
85
110
150
160
40
60
-25 ns
Min. Max.
85
110
140
150
40
60
Unit
mA
mA
mA
I
SB
2
CMOS Standby
Current (CMOS Inputs)
Com.
Ind.
30
40
30
40
30
40
30
40
mA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IC61C1024L POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
1
I
CC
2
I
SB
1
Vcc Operating
Supply Current
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
CC
= V
CC MAX
.,
CE
= V
IL
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
CC
= V
CC MAX
.,
CE
= V
IL
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
CC
= V
CC MAX
,
V
IN
= V
IH
or V
IL
CE1
V
IH
, f = 0 or
CE2
V
IL
, f = 0
V
CC
= V
CC MAX
.,
CE1
V
CC
– 0.2V,
CE2
0.2V
V
IN
> V
CC
– 0.2V, or
V
IN
0.2V, f = 0
Com.
Ind.
-15 ns
Min. Max.
85
110
160
170
40
60
-20 ns
Min. Max.
85
110
150
160
40
60
-25 ns
Min. Max.
85
110
140
150
40
60
Unit
mA
mA
mA
I
SB
2
CMOS Standby
Current (CMOS Inputs)
Com.
Ind.
500
750
500
750
500
750
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
5
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