Maximum Storage Temperature Range . . . . . . . . . . .-65
o
C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(MQFP - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Input voltages may exceed the supply voltages provided the input current is limited to
±100µA.
2.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER
SYSTEM PERFORMANCE
Zero Input Reading
Ratiometric Reading
Rollover Error
Linearity
Common Mode Rejection Ratio
Noise
Leakage Current Input
Zero Reading Drift
(Note 3)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
IN
= 0V, Full Scale = 200mV
V
lN
= V
REF
, V
REF
= 100mV
-V
IN
= +V
lN
≅
200mV Difference in Reading for Equal Positive
and Negative Inputs Near Full Scale
Full Scale = 200mV or Full Scale = 2V Maximum
Deviation from Best Straight Line Fit (Note 5)
V
CM
=
±1V,
V
IN
= 0V, Full Scale = 200mV (Note 5)
V
IN
= 0V, Full Scale = 200mV (Peak-To-Peak Value Not
Exceeded 95% of Time) (Note 5)
V
lN
= 0V (Note 5)
V
lN
= 0V, 0°C To 70°C (Note 5)
V
IN
= 199mV, 0°C To 70°C
,
(Ext. Ref. 0ppm/×°C) (Note 5)
25kΩ Between Common and Positive Supply (With Respect
to + Supply)
25kΩ Between Common and Positive Supply (With Respect
to + Supply) (Note 5)
-000.0
999
-
-
-
-
-
-
-
2.4
-
±000.0
999/
1000
±0.2
±0.2
50
15
1
0.2
1
3.0
150
+000.0
1000
±1
±1
-
-
10
1
5
3.2
-
Digital
Reading
Digital
Reading
Counts
Counts
µV/V
µV
pA
µV/°C
ppm/°C
V
ppm/°C
Scale Factor Temperature Coefficient
COMMON Pin Analog Common Voltage
Temperature Coefficient of Analog
Common
SUPPLY CURRENT
V+ Supply Current
DISPLAY DRIVER
Peak-To-Peak Segment Drive Voltage and
Peak-To-Peak Backplane Drive Voltage
NOTES:
V
IN
= 0 (Does Not Include Common Current) 16kHz
Oscillator (Note 6)
-
70
100
µA
V+ to V- = 9V (Note 4)
4
5.5
6
V
3. Unless otherwise noted, specifications apply to the ICL7136 at T
A
= 25°C, f
CLOCK
= 48kHz. ICL7136 is tested in the circuit of Figure 1.
4. Back plane drive is in phase with segment drive for “off“ segment, 180 degrees out of phase for “on“ segment. Frequency is 20 times conversion rate.
Average DC component is less than 50mV.
5. Not tested, guaranteed by design.
6. 48kHz oscillator increases current by 20µA (Typ).
3
FN3086.6
July 21, 2005
ICL7136
Typical Applications and Test Circuits
IN
R
1
R
3
OSC 1 40
OSC 2 39
OSC 3 38
C
4
TEST 37
R
4
C
1
R
5
C
5
C
2
R
2
C
3
DISPLAY
G2 25
C3 24
A3 23
G3 22
BP 21
REF HI 36
REF LO 35
C
REF
+ 34
C
REF
- 33
COM 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
ICL7136
20 POL
19 AB4
G1
D1
C1
B1
A1
D2
10 C2
11 B2
12 A2
15 D3
16 B3
V+
E1
14 E2
18 E3
F1
13 F2
17 F3
1
2
3
4
5
6
7
8
9
DISPLAY
FIGURE 1. ICL7136 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
4
V- 26
-
C
1
C
2
C
3
C
4
C
5
R
1
R
2
R
3
R
4
R
5
= 0.1µF
= 0.47µF
= 0.047µF
= 50pF
= 0.01µF
= 240kΩ
= 180kΩ
= 180kΩ
= 10kΩ
= 1MΩ
FN3086.6
July 21, 2005
+
+
-
9V
ICL7136
Design Information Summary Sheet
• OSCILLATOR FREQUENCY
f
OSC
= 0.45/RC
C
OSC
> 50pF; R
OSC
> 50kΩ
f
OSC
(Typ) = 48kHz
• OSCILLATOR PERIOD
t
OSC
= RC/0.45
• INTEGRATION CLOCK FREQUENCY
f
CLOCK
= f
OSC
/4
• INTEGRATION PERIOD
t
INT
= 1000 x (4/f
OSC
)
• 60/50Hz REJECTION CRITERION
t
INT
/t
60Hz
or t
lNT
/t
50Hz
= Integer
• OPTIMUM INTEGRATION CURRENT
I
INT
= 1µA
• FULL SCALE ANALOG INPUT VOLTAGE
V
lNFS
(Typ) = 200mV or 2V
• INTEGRATE RESISTOR
V
INFS
-
R
INT
= ----------------
I
INT
• DISPLAY COUNT
V
IN
-
COUNT
=
1000
×
--------------
V
REF
• CONVERSION CYCLE
t
CYC
= t
CL0CK
x 4000
t
CYC
= t
OSC
x 16,000
when f
OSC
= 48kHz; t
CYC
= 333ms
• COMMON MODE INPUT VOLTAGE
(V- + 1V) < V
lN
< (V+ - 0.5V)
• AUTO-ZERO CAPACITOR
0.01µF < C
AZ
< 1µF
• REFERENCE CAPACITOR
0.1µF < C
REF
< 1µF
• V
COM
Biased between V+ and V-.
• V
COM
≅
V+ - 2.8V
Regulation lost when V+ to V- <
≅6.8V.
If V
COM
is externally pulled down to (V + to V -)/2,
the V
COM
circuit will turn off.
• POWER SUPPLY: SINGLE 9V
V+ - V- = 9V
Digital supply is generated internally
V
TEST
≅
V+ - 4.5V
• DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude.
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