ICS525-01/02
OSCaR
TM
User Configurable Clock
Description
The ICS525-01/02 are the most flexible way to
generate a high-quality, high-accuracy, high-frequency
clock output from an inexpensive crystal or clock input.
The name OSCaR stands for OSCillator Replacement,
as they are designed to replace crystal oscillators in
almost any electronic system. The user can configure
the device to produce nearly any output frequency from
any input frequency by grounding or floating the select
pins. Neither microcontroller, software, nor device
programmer are needed to set the frequency. Using
Phase-Locked Loop (PLL) techniques, the device
accepts a standard fundamental mode, inexpensive
crystal to produce output clocks up to 250 MHz. It can
also produce a highly accurate output clock from a
given input clock, keeping them frequency locked
together.
For similar capability with a serial interface, use the
ICS307. For simple multipliers to produce common
frequencies, refer to the LOCO
TM
family of parts, which
are smaller and more cost effective.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined nor guaranteed.
For applications which require defined input to output
timing, use the ICS527-01.
Features
•
Packaged as 28-pin SSOP (150 mil body)
•
Industrial and commercial versions available in Pb
(lead) free package
•
ICS525-01 with output frequencies up to 160 MHz
•
ICS525-02 with output frequencies up to 250 MHz
•
User determines the output frequency by setting all
•
•
•
•
•
•
•
•
•
•
•
•
internal dividers
Eliminates need for custom oscillators
No software needed
Online ICS525 calculator at
www.icst.com/products/ics525inputForm.html
Pull-ups on all select inputs
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Very low jitter
Duty cycle of 45/55 up to 200 MHz
Operating voltage of 3.0 V or 5.5 V
Ideal for oscillator replacement
Industrial temperature version available
For Zero Delay, refer to the ICS527
Block Diagram
2
PD
X1/ICLK
Crystal or clock
input
Crystal
Oscillator
X2
Reference
Divider
VDD
Phase Comparator,
Charge Pump, and
Loop Filter
VCO
Divider
CLK
VCO
Output
Divider
REF
Optional crystal capacitors
7
R6:R0
9
V8:V0
2
GND
3
S2:S0
MDS 525-01/02 M
Integrated Circuit Systems, Inc.
●
1
525 Race Street, San Jose, CA 95126
●
Revision 062304
tel (408) 297-1201
●
www.icst.com
ICS525-01/02
OSCaR
TM
User Configurable Clock
Pin Assignment
R5
R6
S0
S1
S2
VDD
X1/ICLK
X2
GND
V0
V1
V2
V3
V4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R4
R3
R2
R1
R0
VDD
REF
CLK
GND
PD
V8
V7
V6
V5
R5
R6
S0
S1
S2
VDD
X1/ICLK
X2
GND
V0
V1
V2
V3
V4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R4
R3
R2
R1
R0
VDD
REF
CLK
GND
PDTS
V8
V7
V6
V5
ICS525-01
ICS525-02
ICS525-01 Pin Descriptions
Pin
Number
1, 2,
24-28
3, 4, 5
6, 23
7
8
9, 20
10 - 18
19
21
22
Pin
Name
R5, R6,
R0-R4
S0, S1, S2
VDD
X1/ICLK
X2
GND
V0 - V8
PD
CLK
REF
Pin
Type
I(PU)
I(PU)
Power
X1
X2
Power
I(PU)
Input
Output
Output
Pin Description
Reference divider word input pins determined by user. Forms a binary number from 0
to 127.
Select pins for output divider determined by user. See table on page 3
Connect to VDD.
Crystal connection. Connect to a parallel resonant fundamental crystal or input clock.
Crystal connection. Connect to a crystal or leave unconnected for clock.
Connect to ground.
VCO divider word input pins determined by user. Forms a binary number from 0 to
511.
Power-down. Active low. Turns off entire chip when low. Clock outputs stop low.
Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency.
Reference output. Buffered crystal oscillator (or clock ) output.
ICS525-02 Pin Descriptions
Pin
Number
1, 2,
24-28
3, 4, 5
6, 23
7
Pin
Name
R5, R6,
R0-R4
S0, S1, S2
VDD
X1/ICLK
Pin
Type
I(PU)
I(PU)
Power
X1
Pin Description
Reference divider word input pins determined by user. Forms a binary number from 0
to 127.
Select pins for output divider determined by user. See table on page 3
Connect to VDD.
Crystal connection. Connect to a parallel resonant fundamental crystal or input clock.
MDS 525-01/02 M
Integrated Circuit Systems, Inc.
●
2
525 Race Street, San Jose, CA 95126
●
Revision 062304
tel (408) 297-1201
●
www.icst.com
ICS525-01/02
OSCaR
TM
User Configurable Clock
Pin
Number
8
9, 20
10 - 18
19
21
22
Pin
Name
X2
GND
V0 - V8
PD
CLK
REF
Pin
Type
X2
Power
I(PU)
Input
Output
Output
Connect to ground.
Pin Description
Crystal connection. Connect to a crystal or leave unconnected for clock.
VCO divider word input pins determined by user. Forms a binary number from 0 to
511.
Power-down. Active low. Turns off entire chip when low. Clock outputs stop low.
Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency.
Reference output. Buffered crystal oscillator (or clock ) output.
KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections
ICS525-01 Maximum Output Frequency and Output Divider Table
Max Output Frequency (MHz)
S1
S0 CLK Output
S2
Pin 5 Pin 4 Pin 3
Divider
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
10
2
8
4
5
7
9
6
26
160
40
80
50
40
33.3
53
VDD = 5 V
0 - 70
°C
-40 to +85
°C
23
140
36
72
45
36
30
47
VDD = 3.3 V
0 - 70
°C
18
100
25
50
34
26
20
27
-40 to +85
°C
16
90
22
45
30
23
18
24
ICS525-02 Maximum Output Frequency and Output Divider Table
Max Output Frequency (MHz)
S2
S1
S0 CLK Output
Pin 5 Pin 4 Pin 3
Divider
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
6
2
8
4
5
7
1
3
VDD = 5 V
-40 to +85
°C
67
200
50
100
80
57
250
133
VDD = 3.3 V
-40 to +85
°C
40
120
30
60
48
34
200
80
The ICS525-02 is only offered in industrial temperature range.
MDS 525-01/02 M
Integrated Circuit Systems, Inc.
●
3
525 Race Street, San Jose, CA 95126
●
Revision 062304
tel (408) 297-1201
●
www.icst.com
ICS525-01/02
OSCaR
TM
User Configurable Clock
External Components/Crystal
Selection
Decoupling Capacitors
The ICS525-01/02 requries two 0.01µF decoupling
capacitors to be connected between VDD and GND,
one on each side of the chip. The capacitor must be
connected close to the device to minimize lead
inductance. No external power supply filtering is
required for this device.
ICS525-01 Settings
The output of the ICS525-01 can be determined by the
following simple equation:
-
CLK
Frequency = Input Frequency
×
2x
--------------------------------------------
(
VDW + 8
)
(
RDW + 2
) •
OD
Where:
Reference Divider Word (RDW) = 1 to 127 (0 not
permitted)
VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 not
permitted)
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
(
VDW + 8
)
-
10M < Input Frequency
x2x
------------------------------ < 200M
(
3.3
V
)or
320
M
(
5
v
) )
(
RDW + 2
)
InputFrequency
200kHz < ----------------------------------------------
-
(
RDW + 2
)
External Resistors
A 33Ω series terminating resistor can be used next to
the CLK and REF pins.
Crystal Load Capacitors
The approximate total on-chip capacitance for a crystal
is 16 pF, so a parallel resonant, fundamental mode
crystal with this value of load (correlation) capacitance
should be used. For crystals with a specified load
capacitance greater than 16 pF, crystal capacitors may
be connected from each of the pins X1 and X2 to
Ground as shown in the block diagram. The value (in
pF) of these crystal caps should be (CL -16)*2, where
CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the
exact frequency is critical. For a clock input, connect to
X1 and leave X2 unconnected (no capacitors on
either).
See table on page 3 for full details of maximum
output.
ICS525-02 Settings
The output of the ICS525-02 can be determined by the
following simple equation:
-
CLK
Frequency = Input Frequency
×
2x
--------------------------------------------
Determining the Output Frequency
Users have full control in setting the desired output
frequency over the range shown in the table on page 2.
To replace a standard oscillator, users should connect
the divider select input pins directly to ground (or VDD,
although this is not required because of internal
pull-ups) during Printed Circuit Board layout. The
ICS525-01/02 will automatically produce the correct
clock when all components are soldered. It is also
possible to connect the inputs to parallel I/O ports to
switch frequencies. By choosing divides carefully, the
number of inputs which need to be changed can be
minimized. Observe the restrictions on allowed values
of VDW and RDW.
(
VDW + 8
)
(
RDW + 2
) •
OD
Where:
Reference Divider Word (RDW) = 0 to 127
VCO Divider Word (VDW) = 0 to 511
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
(
VDW + 8
)
-
10M < Input Frequency
x2x
------------------------------ <
240
M
(
3.3
V
)or
400
M
(
5
v
) )
(
RDW + 2
)
InputFrequency
200kHz < ----------------------------------------------
-
(
RDW + 2
)
See table on page 3 for full details of maximum
output.
MDS 525-01/02 M
Integrated Circuit Systems, Inc.
●
4
525 Race Street, San Jose, CA 95126
●
Revision 062304
tel (408) 297-1201
●
www.icst.com
ICS525-01/02
OSCaR
TM
User Configurable Clock
The dividers are expressed as integers. For example, if a 66.66 MHz output on CLK1 is desired from a
14.31818 MHz input, the VCO divider word (VDW) should be 276, with an output divide (OD) of 2. In this
example, R6:R0 is 0111011, V8:V0 is 100010100 and S2:S0 is 001. Since all of these inputs have pull-up
resistors, it is only necessary to ground the zero pins, namely V7, V6, V5, V3, V1, V0, R6, R2, S2, and S1.
To determine the best combination of VCO, reference, and output divide, use the ICS525 Calculator on our
web site: www.icst.com/products/ics525inputForm.html. The online form is easy to use and quickly shows
you up to three options for these settings. Alternately, you may send an e-mail to ics-mk@icst.com.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS525-01/02. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature, Commercial
Ambient Operating Temperature, Industrial
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70°C
-40 to +85°C
-65°C to 150°C
125°C
260°C (max. of 10 seconds)
MDS 525-01/02 M
Integrated Circuit Systems, Inc.
●
5
525 Race Street, San Jose, CA 95126
●
Revision 062304
tel (408) 297-1201
●
www.icst.com
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